[M] Change in coreboot[main]: soc/intel: Add Wildcat Lake CPU and PCIE device IDs

[Varun Upadhyay (Code Review)]

Attention is currently required from: Appukuttan V K, Avi Uday, Intel coreboot Reviewers, Nick Vaccaro, Sowmya Aralguppe, Usha P, Varun Upadhyay.

Varun Upadhyay has uploaded a new patch set (#8) to the change originally created by Appukuttan V K. ( https://review.coreboot.org/c/coreboot/+/87262?usp=email )

The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)

Change subject: soc/intel: Add Wildcat Lake CPU and PCIE device IDs
......................................................................

soc/intel: Add Wildcat Lake CPU and PCIE device IDs

This patch adds Wildcat Lake-specific CPU and PCIE device IDs to the
header files.

Reference:
Wildcat Lake Processor Prelim External Device IDs (820363)

BUG=b:394208231
TEST=Verified on Wildcat Lake Simulation Platform

Change-Id: I4bc7a8ea898ee30d565a95b9f85d6f19886bcffb
Signed-off-by: Appukuttan V K 
---
M src/drivers/intel/ish/ish.c
M src/drivers/intel/touch/touch.c
M src/include/cpu/intel/cpu_ids.h
M src/include/device/pci_ids.h
M src/soc/intel/common/block/cnvi/cnvi.c
M src/soc/intel/common/block/cpu/mp_init.c
M src/soc/intel/common/block/cse/cse.c
M src/soc/intel/common/block/dsp/dsp.c
M src/soc/intel/common/block/dtt/dtt.c
M src/soc/intel/common/block/graphics/graphics.c
M src/soc/intel/common/block/hda/hda.c
M src/soc/intel/common/block/i2c/i2c.c
M src/soc/intel/common/block/lpc/lpc.c
M src/soc/intel/common/block/p2sb/p2sb.c
M src/soc/intel/common/block/pcie/pcie.c
M src/soc/intel/common/block/pmc/pmc.c
M src/soc/intel/common/block/smbus/smbus.c
M src/soc/intel/common/block/spi/spi.c
M src/soc/intel/common/block/sram/sram.c
M src/soc/intel/common/block/systemagent/systemagent.c
M src/soc/intel/common/block/tracehub/tracehub.c
M src/soc/intel/common/block/uart/uart.c
M src/soc/intel/common/block/usb4/usb4.c
M src/soc/intel/common/block/usb4/xhci.c
M src/soc/intel/common/block/xhci/xhci.c
25 files changed, 191 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/87262/8