Saurabh Mishra has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81849?usp=email )
Change subject: soc/intel: Add Panther Lake device IDs ......................................................................
soc/intel: Add Panther Lake device IDs
Added Panther Lake specific CPU and PCIE device IDs
Reference: Panher Lake External Design Specification Volume 1
Change-Id: I82f47b6077e28a01f34c59b7e7697323b3d5f990 Signed-off-by: Saurabh Mishra mishra.saurabh@intel.com --- M src/include/cpu/intel/cpu_ids.h M src/include/device/pci_ids.h 2 files changed, 92 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/81849/1
diff --git a/src/include/cpu/intel/cpu_ids.h b/src/include/cpu/intel/cpu_ids.h index e25e97f..76aded0 100644 --- a/src/include/cpu/intel/cpu_ids.h +++ b/src/include/cpu/intel/cpu_ids.h @@ -82,5 +82,6 @@ #define CPUID_RAPTORLAKE_Q0 0xb06a3 #define CPUID_LUNARLAKE_A0_1 0xb06d0 #define CPUID_LUNARLAKE_A0_2 0xb06d1 +#define CPUID_PANTHERLAKE_P 0xC06C0
#endif /* CPU_INTEL_CPU_IDS_H */ diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 4d106a7..5f7c178 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2185,6 +2185,7 @@ #define PCI_DID_INTEL_ADL_N_ISHB 0x54fc #define PCI_DID_INTEL_ADL_P_ISHB 0x51fc #define PCI_DID_INTEL_LNL_ISHB 0xa845 +#define PCI_DID_INTEL_PTL_ISHB 0xE445
/* Intel 82371FB (PIIX) */ #define PCI_DID_INTEL_82371FB_ISA 0x122e @@ -3166,6 +3167,38 @@ #define PCI_DID_INTEL_LNL_ESPI_5 0xa805 #define PCI_DID_INTEL_LNL_ESPI_6 0xa806 #define PCI_DID_INTEL_LNL_ESPI_7 0xa807 +#define PCI_DID_INTEL_PTL_ESPI_0 0xE400 +#define PCI_DID_INTEL_PTL_ESPI_1 0xE401 +#define PCI_DID_INTEL_PTL_ESPI_2 0xE402 +#define PCI_DID_INTEL_PTL_ESPI_3 0xE403 +#define PCI_DID_INTEL_PTL_ESPI_4 0xE404 +#define PCI_DID_INTEL_PTL_ESPI_5 0xE405 +#define PCI_DID_INTEL_PTL_ESPI_6 0xE406 +#define PCI_DID_INTEL_PTL_ESPI_7 0xE407 +#define PCI_DID_INTEL_PTL_ESPI_8 0xE408 +#define PCI_DID_INTEL_PTL_ESPI_9 0xE409 +#define PCI_DID_INTEL_PTL_ESPI_10 0xE40A +#define PCI_DID_INTEL_PTL_ESPI_11 0xE40B +#define PCI_DID_INTEL_PTL_ESPI_12 0xE40C +#define PCI_DID_INTEL_PTL_ESPI_13 0xE40D +#define PCI_DID_INTEL_PTL_ESPI_14 0xE40E +#define PCI_DID_INTEL_PTL_ESPI_15 0xE40F +#define PCI_DID_INTEL_PTL_ESPI_16 0xE410 +#define PCI_DID_INTEL_PTL_ESPI_17 0xE411 +#define PCI_DID_INTEL_PTL_ESPI_18 0xE412 +#define PCI_DID_INTEL_PTL_ESPI_19 0xE413 +#define PCI_DID_INTEL_PTL_ESPI_20 0xE414 +#define PCI_DID_INTEL_PTL_ESPI_21 0xE415 +#define PCI_DID_INTEL_PTL_ESPI_22 0xE416 +#define PCI_DID_INTEL_PTL_ESPI_23 0xE417 +#define PCI_DID_INTEL_PTL_ESPI_24 0xE418 +#define PCI_DID_INTEL_PTL_ESPI_25 0xE419 +#define PCI_DID_INTEL_PTL_ESPI_26 0xE41A +#define PCI_DID_INTEL_PTL_ESPI_27 0xE41B +#define PCI_DID_INTEL_PTL_ESPI_28 0xE41C +#define PCI_DID_INTEL_PTL_ESPI_29 0xE41D +#define PCI_DID_INTEL_PTL_ESPI_30 0xE41E +#define PCI_DID_INTEL_PTL_ESPI_31 0xE41F
/* Intel PCIE device ids */ #define PCI_DID_INTEL_LPT_H_PCIE_RP1 0x8c10 @@ -3528,6 +3561,14 @@ #define PCI_DID_INTEL_LNL_PCIE_RP6 0xa83d #define PCI_DID_INTEL_LNL_PCIE_RP7 0xa83e #define PCI_DID_INTEL_LNL_PCIE_RP8 0xa83f +#define PCI_DID_INTEL_PTL_PCIE_RP1 0xE438 +#define PCI_DID_INTEL_PTL_PCIE_RP2 0xE439 +#define PCI_DID_INTEL_PTL_PCIE_RP3 0xE43A +#define PCI_DID_INTEL_PTL_PCIE_RP4 0xE43B +#define PCI_DID_INTEL_PTL_PCIE_RP5 0xE43C +#define PCI_DID_INTEL_PTL_PCIE_RP6 0xE43D +#define PCI_DID_INTEL_PTL_PCIE_RP7 0xE43E +#define PCI_DID_INTEL_PTL_PCIE_RP8 0xE43F
#define PCI_DID_INTEL_RPP_S_PCIE_RP1 0x7a38 #define PCI_DID_INTEL_RPP_S_PCIE_RP2 0x7a39 @@ -3672,6 +3713,7 @@ #define PCI_DID_INTEL_RPP_P_PMC 0x51a1 #define PCI_DID_INTEL_RPP_S_PMC 0x7a21 #define PCI_DID_INTEL_LNL_PMC 0xa821 +#define PCI_DID_INTEL_PTL_PMC 0xE421
/* Intel I2C device Ids */ #define PCI_DID_INTEL_LPT_LP_I2C0 0x9c61 @@ -3803,6 +3845,13 @@ #define PCI_DID_INTEL_LNL_I2C4 0xa850 #define PCI_DID_INTEL_LNL_I2C5 0xa851
+#define PCI_DID_INTEL_PTL_I2C0 0xE478 +#define PCI_DID_INTEL_PTL_I2C1 0xE479 +#define PCI_DID_INTEL_PTL_I2C2 0xE47A +#define PCI_DID_INTEL_PTL_I2C3 0xE47B +#define PCI_DID_INTEL_PTL_I2C4 0xE450 +#define PCI_DID_INTEL_PTL_I2C5 0xE451 + /* Intel UART device Ids */ #define PCI_DID_INTEL_LPT_LP_UART0 0x9c63 #define PCI_DID_INTEL_LPT_LP_UART1 0x9c64 @@ -3886,6 +3935,10 @@ #define PCI_DID_INTEL_LNL_UART1 0xa826 #define PCI_DID_INTEL_LNL_UART2 0xa852
+#define PCI_DID_INTEL_PTL_UART0 0xE425 +#define PCI_DID_INTEL_PTL_UART1 0xE426 +#define PCI_DID_INTEL_PTL_UART2 0xE452 + /* Intel SPI device Ids */ #define PCI_DID_INTEL_LPT_LP_GSPI0 0x9c65 #define PCI_DID_INTEL_LPT_LP_GSPI1 0x9c66 @@ -3985,6 +4038,11 @@ #define PCI_DID_INTEL_LNL_GSPI1 0xa830 #define PCI_DID_INTEL_LNL_GSPI2 0xa846
+#define PCI_DID_INTEL_PTL_HWSEQ_SPI 0xE423 +#define PCI_DID_INTEL_PTL_SPI0 0xE427 +#define PCI_DID_INTEL_PTL_SPI1 0xE430 +#define PCI_DID_INTEL_PTL_SPI2 0xE446 + /* Intel IGD device Ids */ #define PCI_DID_INTEL_SKL_GT1F_DT2 0x1902 #define PCI_DID_INTEL_SKL_GT1_SULTM 0x1906 @@ -4147,6 +4205,8 @@ #define PCI_DID_INTEL_RPL_U_GT4 0xa7ac #define PCI_DID_INTEL_RPL_U_GT5 0xa7ad #define PCI_DID_INTEL_LNL_M_GT2 0x64a0 +#define PCI_DID_INTEL_PTL_P_GT2 0x64a0 +#define PCI_DID_INTEL_PTL_P_GT3 0xb080
/* Intel Northbridge Ids */ #define PCI_DID_INTEL_APL_NB 0x5af0 @@ -4290,6 +4350,7 @@ #define PCI_DID_INTEL_RPL_P_ID_8 0xa716 #define PCI_DID_INTEL_LNL_M_ID 0x6400 #define PCI_DID_INTEL_LNL_M_ID_1 0x6410 +#define PCI_DID_INTEL_PTL_P_ID 0xB001
/* Intel SMBUS device Ids */ #define PCI_DID_INTEL_LPT_H_SMBUS 0x8c22 @@ -4319,6 +4380,7 @@ #define PCI_DID_INTEL_RPP_P_SMBUS 0x51a3 #define PCI_DID_INTEL_RPP_S_SMBUS 0x7a23 #define PCI_DID_INTEL_LNL_SMBUS 0xa822 +#define PCI_DID_INTEL_PTL_SMBUS 0xE422
/* Intel EHCI device IDs */ #define PCI_DID_INTEL_LPT_H_EHCI_1 0x8c26 @@ -4361,6 +4423,8 @@ #define PCI_DID_INTEL_RPP_S_XHCI 0x7a60 #define PCI_DID_INTEL_LNL_XHCI 0xa87d #define PCI_DID_INTEL_LNL_TCSS_XHCI 0xa831 +#define PCI_DID_INTEL_PTL_XHCI 0xE47D +#define PCI_DID_INTEL_PTL_TCSS_XHCI 0xE431
/* Intel P2SB device Ids */ #define PCI_DID_INTEL_APL_P2SB 0x5a92 @@ -4389,6 +4453,8 @@ #define PCI_DID_INTEL_RPP_S_P2SB 0x7a20 #define PCI_DID_INTEL_LNL_P2SB 0xa820 #define PCI_DID_INTEL_LNL_P2SB2 0xa84c +#define PCI_DID_INTEL_PTL_P2SB 0xE420 +#define PCI_DID_INTEL_PTL_P2SB2 0xE44C
/* Intel SRAM device Ids */ #define PCI_DID_INTEL_APL_SRAM 0x5aec @@ -4404,6 +4470,7 @@ #define PCI_DID_INTEL_MTL_IOE_M_SRAM 0x7ebf #define PCI_DID_INTEL_MTL_IOE_P_SRAM 0x7ecf #define PCI_DID_INTEL_LNL_SRAM 0xa87f +#define PCI_DID_INTEL_PTL_SRAM 0xE47F
/* Intel AUDIO device Ids */ #define PCI_DID_INTEL_LPT_H_AUDIO 0x8c20 @@ -4470,6 +4537,15 @@ #define PCI_DID_INTEL_LNL_AUDIO_7 0xa82e #define PCI_DID_INTEL_LNL_AUDIO_8 0xa82f
+#define PCI_DID_INTEL_PTL_AUDIO_1 0XE428 +#define PCI_DID_INTEL_PTL_AUDIO_2 0XE429 +#define PCI_DID_INTEL_PTL_AUDIO_3 0XE42A +#define PCI_DID_INTEL_PTL_AUDIO_4 0XE42B +#define PCI_DID_INTEL_PTL_AUDIO_5 0XE42C +#define PCI_DID_INTEL_PTL_AUDIO_6 0XE42D +#define PCI_DID_INTEL_PTL_AUDIO_7 0XE42E +#define PCI_DID_INTEL_PTL_AUDIO_8 0XE42F + /* Intel HECI/ME device Ids */ #define PCI_DID_INTEL_LPT_H_MEI 0x8c3a #define PCI_DID_INTEL_LPT_H_MEI_9 0x8cba @@ -4515,6 +4591,10 @@ #define PCI_DID_INTEL_RPP_S_CSE3 0x7a6d #define PCI_DID_INTEL_MTL_CSE0 0x7e70 #define PCI_DID_INTEL_LNL_CSE0 0xa870 +#define PCI_DID_INTEL_PTL_P_CSE0 0xE470 +#define PCI_DID_INTEL_PTL_P_CSE1 0xE471 +#define PCI_DID_INTEL_PTL_P_CSE2 0xE474 +#define PCI_DID_INTEL_PTL_P_CSE3 0xE475
/* Intel XDCI device Ids */ #define PCI_DID_INTEL_APL_XDCI 0x5aaa @@ -4538,6 +4618,7 @@ #define PCI_DID_INTEL_MTL_XDCI 0x7e7e #define PCI_DID_INTEL_MTL_M_TCSS_XDCI 0x7eb1 #define PCI_DID_INTEL_MTL_P_TCSS_XDCI 0x7ec1 +#define PCI_DID_INTEL_PTL_TCSS_XDCI 0xE432
/* Intel SD device Ids */ #define PCI_DID_INTEL_LPT_LP_SD 0x9c35 @@ -4559,6 +4640,7 @@
/* Intel UFS device Ids */ #define PCI_DID_INTEL_LNL_UFS 0xa847 +#define PCI_DID_INTEL_PTL_UFS 0xE447
/* Intel Thunderbolt device Ids */ #define PCI_DID_INTEL_TGL_TBT_RP0 0x9a23 @@ -4598,6 +4680,8 @@ #define PCI_DID_INTEL_LNL_TBT_RP2 0xa860 #define PCI_DID_INTEL_LNL_TBT_DMA0 0xa833 #define PCI_DID_INTEL_LNL_TBT_DMA1 0xa834 +#define PCI_DID_INTEL_PTL_TBT_DMA0 0xE433 +#define PCI_DID_INTEL_PTL_TBT_DMA1 0xE434
/* Intel WIFI Ids */ #define PCI_DID_1000_SERIES_WIFI 0x0084 @@ -4630,6 +4714,7 @@ #define PCI_DID_TP_6SERIES_WIFI 0x2725 #define PCI_DID_MP_7SERIES_WIFI 0x272b
+/* Intel IPU device IDs */ #define PCI_DID_INTEL_TGL_IPU 0x9a19 #define PCI_DID_INTEL_TGL_H_IPU 0x9a39 #define PCI_DID_INTEL_JSL_IPU 0x4e19 @@ -4638,6 +4723,7 @@ #define PCI_DID_INTEL_MTL_IPU 0x7d19 #define PCI_DID_INTEL_RPL_IPU 0xa75d #define PCI_DID_INTEL_LNL_IPU 0x645d +#define PCI_DID_INTEL_PTL_IPU 0xB05D
/* Intel Dynamic Tuning Technology Device */ #define PCI_DID_INTEL_CML_DTT 0x1903 @@ -4697,6 +4783,11 @@ #define PCI_DID_INTEL_LNL_CNVI_WIFI_2 0xa842 #define PCI_DID_INTEL_LNL_CNVI_WIFI_3 0xa843 #define PCI_DID_INTEL_LNL_CNVI_BT 0xa876 +#define PCI_DID_INTEL_PTL_CNVI_WIFI_0 0xE440 +#define PCI_DID_INTEL_PTL_CNVI_WIFI_1 0xE441 +#define PCI_DID_INTEL_PTL_CNVI_WIFI_2 0xE442 +#define PCI_DID_INTEL_PTL_CNVI_WIFI_3 0xE443 +#define PCI_DID_INTEL_PTL_CNVI_BT 0xE476
/* Platform Security Engine */ #define PCI_DID_INTEL_LNL_PSE0 0xa862