Change in coreboot[master]: mb/google/brya: Add FPMCU power control

[EricR Lai (Code Review)]

EricR Lai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52185 )

Change subject: mb/google/brya: Add FPMCU power control
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mb/google/brya: Add FPMCU power control

Enable CRFP power control in devicetree. And update gpio for FPMCU.

BUG=b:181377402
BRANCH=None

Signed-off-by: Eric Lai 
Change-Id: I8a8fae80c3cc186e0a097ab2007abb656f382cbd
---
M src/mainboard/google/brya/variants/baseboard/gpio.c
M src/mainboard/google/brya/variants/brya0/overridetree.cb
2 files changed, 5 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/52185/1

diff --git a/src/mainboard/google/brya/variants/baseboard/gpio.c b/src/mainboard/google/brya/variants/baseboard/gpio.c
index 6482b9c..78c5928 100644
--- a/src/mainboard/google/brya/variants/baseboard/gpio.c
+++ b/src/mainboard/google/brya/variants/baseboard/gpio.c
@@ -122,7 +122,7 @@
    /* D1  : ISH_GP1 ==> FP_RST_ODL */
    PAD_CFG_GPO(GPP_D1, 0, DEEP),
    /* D2  : ISH_GP2 ==> EN_FP_PWR */
-	PAD_CFG_GPO(GPP_D2, 1, DEEP),
+	PAD_CFG_GPO(GPP_D2, 0, DEEP),
    /* D3  : ISH_GP3 ==> WCAM_RST_L */
    PAD_CFG_GPO(GPP_D3, 0, DEEP),
    /* D4  : IMGCLKOUT0 ==> BT_DISABLE_L */
diff --git a/src/mainboard/google/brya/variants/brya0/overridetree.cb b/src/mainboard/google/brya/variants/brya0/overridetree.cb
index b115aeb..4f05713 100644
--- a/src/mainboard/google/brya/variants/brya0/overridetree.cb
+++ b/src/mainboard/google/brya/variants/brya0/overridetree.cb
@@ -190,6 +190,10 @@
    			register "compat_string" = ""google,cros-ec-spi""
    			register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW_WAKE(GPP_F15)"
    			register "wake" = "GPE0_DW2_15"
+				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
+				register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
+				register "enable_delay_ms" = "3"
+				register "has_power_resource" = "1"
    			device spi 1 on end
    		end # FPMCU
    	end