Change in coreboot[master]: Rename MMCONF Kconfigs to ECAM_MMCONF

[Angel Pons (Code Review)]

Attention is currently required from: Raul Rangel, Mariusz Szafrański, Jonathan Zhang, Paul Menzel, Stefan Reinauer, Kyösti Mälkki, Andrey Petrov, Patrick Rudolph, Nico Huber, Anjaneya "Reddy" Chagam, Johnny Lin, Suresh Bellampalli, Morgan Jang, Michal Motyl, Alexander Couzens, Felix Held, Shelley Chen, Furquan Shaikh, Lance Zhao, Jason Glenesk, Martin Roth, Damien Zammit, Lee Leahy, Marshall Dawson, Tim Wawrzynczak, Vanessa Eusebio, Huang Jin.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57333 )

Change subject: Rename MMCONF Kconfigs to ECAM_MMCONF
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Patch Set 5:

(3 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/57333/comment/14fa7b8d_61fc77b2 
PS3, Line 11: This can be confusing as
            : other platforms, such as ARM, use a different way of mapping the pci
            : config space to memory.
> That sounds right for QC platform. Other platforms could implement this in other ways too.

I see, thanks!

File src/device/Kconfig:

https://review.coreboot.org/c/coreboot/+/57333/comment/c03343b2_cc17fe41 
PS5, Line 502: config NO_ECAM_MMCONF_SUPPORT
I'd rather keep this symbol as `NO_MMCONF_SUPPORT`. When selected, it indicates that a platform does not support MMCONF at all. Otherwise, `NO_ECAM_MMCONF_SUPPORT` and `ECAM_MMCONF_SUPPORT` always have opposite values, which is redundant. Some changes across the tree might be needed, but the resulting approach should be cleaner.

I just noticed that the MMCONF support is actually a choice: at most one MMCONF implementation may be selected at the same time. However, using a Kconfig choice would be awkward, because Kconfig choice symbols can't be selected.

I also like Furquan's suggestions, but only saw them after writing this comment. They made me realize it's not about MMCONF, but about extended config space access.

https://review.coreboot.org/c/coreboot/+/57333/comment/3a65257c_b59e973e 
PS5, Line 519: This method is specific to x86 platforms.
I think there's at least two non-x86 platforms that may use this: POWER, and the currently-supported Cavium ARM SoC. I would simply omit the architecture-specific remarks.

AFAIUI, platforms selecting this expose the entire PCI config space using one large MMIO window. Maybe explaining something like this in the help text would be more useful?