Change in coreboot[master]: soc/intel{cannonlake,icelake}/northbridge.asl: Correct flash range
Wim Vervoorn has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37694 )
Change subject: soc/intel{cannonlake,icelake}/northbridge.asl: Correct flash range ......................................................................
soc/intel{cannonlake,icelake}/northbridge.asl: Correct flash range
The base address of the 16 MB flash range was reported as 0xFFF00000 this causes the range to extend above the 4GB boundary.
Change the base to 0xFF000000 as is the case with e.g. Skylake.
BUG=N/A TEST=build
Change-Id: Ia8de01769ced00c5ae13f255760401933230b88c Signed-off-by: Wim Vervoorn wvervoorn@eltan.com --- M src/soc/intel/cannonlake/acpi/northbridge.asl M src/soc/intel/icelake/acpi/northbridge.asl 2 files changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/37694/1
diff --git a/src/soc/intel/cannonlake/acpi/northbridge.asl b/src/soc/intel/cannonlake/acpi/northbridge.asl index 22ddad7..2529116 100644 --- a/src/soc/intel/cannonlake/acpi/northbridge.asl +++ b/src/soc/intel/cannonlake/acpi/northbridge.asl @@ -307,7 +307,7 @@ Memory32Fixed (ReadOnly, VTD_BASE_ADDRESS, VTD_BASE_SIZE)
/* FLASH range */ - Memory32Fixed (ReadOnly, 0xFFF00000, 0x1000000, FIOH) + Memory32Fixed (ReadOnly, 0xFF000000, 0x1000000, FIOH)
/* Local APIC range(0xFEE0_0000 to 0xFEEF_FFFF) */ Memory32Fixed (ReadOnly, 0xFEE00000, 0x100000, LIOH) diff --git a/src/soc/intel/icelake/acpi/northbridge.asl b/src/soc/intel/icelake/acpi/northbridge.asl index e99e7ed..68c7f9e 100644 --- a/src/soc/intel/icelake/acpi/northbridge.asl +++ b/src/soc/intel/icelake/acpi/northbridge.asl @@ -308,7 +308,7 @@ Memory32Fixed (ReadOnly, VTD_BASE_ADDRESS, VTD_BASE_SIZE)
/* FLASH range */ - Memory32Fixed (ReadOnly, 0xFFF00000, 0x1000000, FIOH) + Memory32Fixed (ReadOnly, 0xFF000000, 0x1000000, FIOH)
/* Local APIC range(0xFEE0_0000 to 0xFEEF_FFFF) */ Memory32Fixed (ReadOnly, 0xFEE00000, 0x100000, LIOH)
Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37694 )
Change subject: soc/intel{cannonlake,icelake}/northbridge.asl: Correct flash range ......................................................................
Patch Set 2: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/37694 )
Change subject: soc/intel{cannonlake,icelake}/northbridge.asl: Correct flash range ......................................................................
soc/intel{cannonlake,icelake}/northbridge.asl: Correct flash range
The base address of the 16 MB flash range was reported as 0xFFF00000 this causes the range to extend above the 4GB boundary.
Change the base to 0xFF000000 as is the case with e.g. Skylake.
BUG=N/A TEST=build
Change-Id: Ia8de01769ced00c5ae13f255760401933230b88c Signed-off-by: Wim Vervoorn wvervoorn@eltan.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/37694 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Frans Hendriks fhendriks@eltan.com --- M src/soc/intel/cannonlake/acpi/northbridge.asl M src/soc/intel/icelake/acpi/northbridge.asl 2 files changed, 2 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Frans Hendriks: Looks good to me, approved
diff --git a/src/soc/intel/cannonlake/acpi/northbridge.asl b/src/soc/intel/cannonlake/acpi/northbridge.asl index 22ddad7..2529116 100644 --- a/src/soc/intel/cannonlake/acpi/northbridge.asl +++ b/src/soc/intel/cannonlake/acpi/northbridge.asl @@ -307,7 +307,7 @@ Memory32Fixed (ReadOnly, VTD_BASE_ADDRESS, VTD_BASE_SIZE)
/* FLASH range */ - Memory32Fixed (ReadOnly, 0xFFF00000, 0x1000000, FIOH) + Memory32Fixed (ReadOnly, 0xFF000000, 0x1000000, FIOH)
/* Local APIC range(0xFEE0_0000 to 0xFEEF_FFFF) */ Memory32Fixed (ReadOnly, 0xFEE00000, 0x100000, LIOH) diff --git a/src/soc/intel/icelake/acpi/northbridge.asl b/src/soc/intel/icelake/acpi/northbridge.asl index e99e7ed..68c7f9e 100644 --- a/src/soc/intel/icelake/acpi/northbridge.asl +++ b/src/soc/intel/icelake/acpi/northbridge.asl @@ -308,7 +308,7 @@ Memory32Fixed (ReadOnly, VTD_BASE_ADDRESS, VTD_BASE_SIZE)
/* FLASH range */ - Memory32Fixed (ReadOnly, 0xFFF00000, 0x1000000, FIOH) + Memory32Fixed (ReadOnly, 0xFF000000, 0x1000000, FIOH)
/* Local APIC range(0xFEE0_0000 to 0xFEEF_FFFF) */ Memory32Fixed (ReadOnly, 0xFEE00000, 0x100000, LIOH)
-
Frans Hendriks (Code Review) -
Patrick Georgi (Code Review)
-
Wim Vervoorn (Code Review)