Change in coreboot[master]: soc/intel/icelake: Open ports 0x60, 0x64 for keyboard controller

[Aamir Bohra (Code Review)]

Hello Shelley Chen,

I'd like you to do a code review. Please visit

https://review.coreboot.org/29327

to review the following change.

Change subject: soc/intel/icelake: Open ports 0x60,0x64 for keyboard controller
......................................................................

soc/intel/icelake: Open ports 0x60,0x64 for keyboard controller

Change-Id: I6525c2a46eef835dc64682466364a5b8fbb35226
Signed-off-by: Shelley Chen 
---
M src/soc/intel/icelake/bootblock/pch.c
1 file changed, 2 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/29327/1

diff --git a/src/soc/intel/icelake/bootblock/pch.c b/src/soc/intel/icelake/bootblock/pch.c
index 269e2a3..2fc94f4 100644
--- a/src/soc/intel/icelake/bootblock/pch.c
+++ b/src/soc/intel/icelake/bootblock/pch.c
@@ -181,7 +181,8 @@
    }

/* IO Decode Enable */
-	dec_en |= SE_LPC_EN | KBC_LPC_EN | MC1_LPC_EN | GAMEL_LPC_EN;
+	dec_en |= SE_LPC_EN | KBC_LPC_EN | MC1_LPC_EN | GAMEL_LPC_EN |
+		LPC_IOE_KBC_60_64;
    pci_write_config16(PCH_DEV_LPC, LPC_EN, dec_en);
    pcr_write16(PID_DMI, PCR_DMI_LPCIOE, dec_en);