[S] Change in coreboot[master]: mb/siemens/mc_ehl1: Disable L1 prefetcher

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68668 )

(

2 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
 )Change subject: mb/siemens/mc_ehl1: Disable L1 prefetcher
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mb/siemens/mc_ehl1: Disable L1 prefetcher

The highly real time driven application executed on mc_ehl1 has shown
that the L1 prefetcher on Elkhart Lake is too aggressive which in the
end leads to an increased number of cache misses. Disabling the L1
prefetcher boosts up the performance (in some cases by more than 10 %)
in this specific use case.

Change-Id: Id09a7f8f812707cd05bd5e3b530e5c3ad8067b16
Signed-off-by: Werner Zeh 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68668
Reviewed-by: Angel Pons 
Tested-by: build bot (Jenkins) 
Reviewed-by: Frans Hendriks 
---
M src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb
1 file changed, 23 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Frans Hendriks: Looks good to me, but someone else must approve
  Angel Pons: Looks good to me, approved

diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb
index bc3c4a0..319a8437 100644
--- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb
+++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb
@@ -132,6 +132,9 @@
    	.vcc_low_high_us = 50,
    }"

+	# Disable L1 prefetcher
+	register "L1_prefetcher_disable" = "true"
+
    device domain 0 on
    	device pci 00.0 on	end # Host Bridge
    	device pci 02.0 on	end # Integrated Graphics Device