[S] Change in coreboot[master]: mb/clevo/l140mu: work around PECI staying high when idle, blocking s0ix

[Michael Niewöhner (Code Review)]

Michael Niewöhner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68794 )

(

4 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
 )Change subject: mb/clevo/l140mu: work around PECI staying high when idle, blocking s0ix
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mb/clevo/l140mu: work around PECI staying high when idle, blocking s0ix

According to Intel doc# 575683 the PECI bus should be low when idle and
is pulled up by clients with strong drive. However, for unknown reasons
the bus stays high on this board, blocking s0ix entry.

The PECI reference schematic in the ASPEED AST2400 BMC datasheet
(actually not related to this board) says that a pull-down is *required*
for the idle state.

This might be just a requirement of this BMC, since this is nowhere
documented in Intel datasheets, schematics or elsewhere. However,
configuring a weak pull-down (20 k) on the PECI pad indeed solves this
problem for now.

Change-Id: I85193000af67cd2c0465bdbb58cdd51b68fd5b4f
Signed-off-by: Michael Niewöhner 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68794
Reviewed-by: Angel Pons 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/clevo/tgl-u/variants/l140mu/gpio.c
1 file changed, 30 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved

diff --git a/src/mainboard/clevo/tgl-u/variants/l140mu/gpio.c b/src/mainboard/clevo/tgl-u/variants/l140mu/gpio.c
index 6919baf..831b5fe 100644
--- a/src/mainboard/clevo/tgl-u/variants/l140mu/gpio.c
+++ b/src/mainboard/clevo/tgl-u/variants/l140mu/gpio.c
@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

+#include <intelblocks/pcr.h>
 #include <soc/gpe.h>
 #include <soc/gpio.h>
 #include <variant/gpio.h>
@@ -232,4 +233,7 @@
 void variant_configure_gpios(void)
 {
    gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
+
+	/* PECI idle workaround */
+	pcr_rmw32(0x6b, 0x744, ~PAD_CFG1_PULL_MASK, PAD_CFG1_PULL_DN_20K);
 }