Change in coreboot[master]: mb/google/zork/variants/vilboz: Enable BayHub lv2 driver

[John Su (Code Review)]

John Su has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/49822 )

Change subject: mb/google/zork/variants/vilboz: Enable BayHub lv2 driver
......................................................................

mb/google/zork/variants/vilboz: Enable BayHub lv2 driver

Enable this driver along with power saving.

BUG=b:177955523
BRANCH=zork
TEST=boot and see this message:
BayHub LV2: Power-saving enabled 110102

Signed-off-by: John Su 
Change-Id: Icd87ea585dfaa2185abf1f7bf803e9c9a6e63972
---
M src/mainboard/google/zork/Kconfig
M src/mainboard/google/zork/variants/vilboz/overridetree.cb
2 files changed, 7 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/49822/1

diff --git a/src/mainboard/google/zork/Kconfig b/src/mainboard/google/zork/Kconfig
index 4fce3b8..d1ea4e2 100644
--- a/src/mainboard/google/zork/Kconfig
+++ b/src/mainboard/google/zork/Kconfig
@@ -46,6 +46,7 @@
    select HAVE_ACPI_RESUME
    select DRIVERS_USB_ACPI
    select DRIVERS_UART_ACPI
+	select DRIVERS_GENERIC_LV2 if BOARD_GOOGLE_VILBOZ

config ELOG_BOOT_COUNT_CMOS_OFFSET
    int
diff --git a/src/mainboard/google/zork/variants/vilboz/overridetree.cb b/src/mainboard/google/zork/variants/vilboz/overridetree.cb
index f484e9a..0bddb64 100644
--- a/src/mainboard/google/zork/variants/vilboz/overridetree.cb
+++ b/src/mainboard/google/zork/variants/vilboz/overridetree.cb
@@ -50,6 +50,12 @@
    # See AMD 55570-B1 Table 13: PCI Device ID Assignments.
    device domain 0 on
    	subsystemid 0x1022 0x1510 inherit
+		device pci 1.3 on
+			chip drivers/generic/bayhub_lv2
+				register "power_saving" = "1"
+				device pci 00.0 on end
+			end
+		end # GPP Bridge 2 - SD
    	device pci 8.1 on
    		device pci 0.5 on
    			chip drivers/amd/i2s_machine_dev