Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38771 )
Change subject: mb/google/dedede: Add GPE configuration ......................................................................
mb/google/dedede: Add GPE configuration
Configure the GPIO groups to be routed to the GPE0 block.
BUG=None TEST=Build the mainboard.
Signed-off-by: Karthikeyan Ramasubramanian kramasub@google.com Change-Id: Ife4d0179bd9fe1785e971686478f7c76de805e87 --- M src/mainboard/google/dedede/variants/baseboard/devicetree.cb 1 file changed, 16 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/38771/1
diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb index cdd325c..aedd32f 100644 --- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb @@ -3,6 +3,22 @@ device lapic 0 on end end
+ # GPE configuration + # Note that GPE events called out in ASL code rely on this + # route, i.e., if this route changes then the affected GPE + # offset bits also need to be changed. + # DW0 is used by: + # - GPP_B3 - TRACKPAD_INT_ODL + # - GPP_B4 - H1_AP_INT_ODL + # DW1 is used by: + # - GPP_D3 - WLAN_PCIE_WAKE_ODL + # DW2 is used by: + # - GPP_H16 - WWAN_HOST_WAKE + # EC_AP_WAKE_ODL is routed to LAN_WAKE#/GPD02 & is part of DW3. + register "pmc_gpe0_dw0" = "GPP_B" + register "pmc_gpe0_dw1" = "GPP_D" + register "pmc_gpe0_dw2" = "GPP_H" + device domain 0 on device pci 00.0 off end # Host Bridge device pci 02.0 off end # Integrated Graphics Device
Justin TerAvest has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38771 )
Change subject: mb/google/dedede: Add GPE configuration ......................................................................
Patch Set 1: Code-Review+2
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38771 )
Change subject: mb/google/dedede: Add GPE configuration ......................................................................
Patch Set 1: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38771 )
Change subject: mb/google/dedede: Add GPE configuration ......................................................................
mb/google/dedede: Add GPE configuration
Configure the GPIO groups to be routed to the GPE0 block.
BUG=None TEST=Build the mainboard.
Signed-off-by: Karthikeyan Ramasubramanian kramasub@google.com Change-Id: Ife4d0179bd9fe1785e971686478f7c76de805e87 Reviewed-on: https://review.coreboot.org/c/coreboot/+/38771 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Justin TerAvest teravest@chromium.org Reviewed-by: Furquan Shaikh furquan@google.com --- M src/mainboard/google/dedede/variants/baseboard/devicetree.cb 1 file changed, 16 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Justin TerAvest: Looks good to me, approved
diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb index cdd325c..aedd32f 100644 --- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb @@ -3,6 +3,22 @@ device lapic 0 on end end
+ # GPE configuration + # Note that GPE events called out in ASL code rely on this + # route, i.e., if this route changes then the affected GPE + # offset bits also need to be changed. + # DW0 is used by: + # - GPP_B3 - TRACKPAD_INT_ODL + # - GPP_B4 - H1_AP_INT_ODL + # DW1 is used by: + # - GPP_D3 - WLAN_PCIE_WAKE_ODL + # DW2 is used by: + # - GPP_H16 - WWAN_HOST_WAKE + # EC_AP_WAKE_ODL is routed to LAN_WAKE#/GPD02 & is part of DW3. + register "pmc_gpe0_dw0" = "GPP_B" + register "pmc_gpe0_dw1" = "GPP_D" + register "pmc_gpe0_dw2" = "GPP_H" + device domain 0 on device pci 00.0 off end # Host Bridge device pci 02.0 off end # Integrated Graphics Device
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Furquan Shaikh (Code Review) -
Justin TerAvest (Code Review)
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Karthik Ramasubramanian (Code Review)
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Patrick Georgi (Code Review)