Change in coreboot[master]: mb/volteer: Disable TBT if platform is only USB3

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Brandon Breitenstein (Code Review)

23 Jul 2020 23 Jul '20

9:38 p.m.

Brandon Breitenstein has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43771 )

Change subject: mb/volteer: Disable TBT if platform is only USB3 ......................................................................

mb/volteer: Disable TBT if platform is only USB3

TBT ports should be disabled if the DB is a USB3 DB. It is assumed if the DB doesn't support TBT the platform as a whole should only be USB3 capable and TBT functionality on both ports should be disabled

BUG=NONE BRANCH=NONE TEST=Built coreboot and verified that TBT was disabled on platform with USB3 DB and enabled on platform with USB4/TBT DB

Change-Id: I594f2e9483aaf896de2b6aea9a3460bd3826c58c Signed-off-by: Brandon Breitenstein brandon.breitenstein@intel.com --- M src/mainboard/google/volteer/romstage.c 1 file changed, 7 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/43771/1

diff --git a/src/mainboard/google/volteer/romstage.c b/src/mainboard/google/volteer/romstage.c index d35bbb5..a8da340 100644 --- a/src/mainboard/google/volteer/romstage.c +++ b/src/mainboard/google/volteer/romstage.c @@ -31,6 +31,13 @@ if (fw_config_probe(FW_CONFIG(AUDIO, NONE))) mem_cfg->PchHdaEnable = 0;

+ /* If the DB is USB3 disable TBT on the platform */ + if (fw_config_probe(FW_CONFIG(DB_USB, USB3_ACTIVE)) || + fw_config_probe(FW_CONFIG(DB_USB, USB3_PASSIVE))) { + mem_cfg->TcssItbtPcie0En = 0; + mem_cfg->TcssItbtPcie1En = 0; + } + meminit_lpddr4x(mem_cfg, board_cfg, &spd_info, half_populated); }

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Furquan Shaikh (Code Review)

23 Jul 23 Jul

9:43 p.m.

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43771 )

Change subject: mb/volteer: Disable TBT if platform is only USB3 ......................................................................

Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/43771/1/src/mainboard/google/voltee... File src/mainboard/google/volteer/romstage.c:

https://review.coreboot.org/c/coreboot/+/43771/1/src/mainboard/google/voltee... PS1, Line 39: } What about the disaling of USB4 devices from devicetree?

Brandon Breitenstein (Code Review)

9:50 p.m.

Brandon Breitenstein has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43771 )

Change subject: mb/volteer: Disable TBT if platform is only USB3 ......................................................................

Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/43771/1/src/mainboard/google/voltee... File src/mainboard/google/volteer/romstage.c:

https://review.coreboot.org/c/coreboot/+/43771/1/src/mainboard/google/voltee... PS1, Line 39: }

...

What about the disaling of USB4 devices from devicetree?

the devicetree entries appear to only be used to set these settings (pci 07.0-07.3) are you referring to the xhci?

Furquan Shaikh (Code Review)

11:02 p.m.

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43771 )

Change subject: mb/volteer: Disable TBT if platform is only USB3 ......................................................................

Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/43771/1/src/mainboard/google/voltee... File src/mainboard/google/volteer/romstage.c:

https://review.coreboot.org/c/coreboot/+/43771/1/src/mainboard/google/voltee... PS1, Line 39: }

...

the devicetree entries appear to only be used to set these settings (pci 07.0-07. […]

Yes, I was referring to the USB4 controllers and the DMA controllers in the device tree. (07.0-07.3 and 0d.2-0d.3)

Brandon Breitenstein (Code Review)

24 Jul 24 Jul

12:14 a.m.

Brandon Breitenstein has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43771 )

Change subject: mb/volteer: Disable TBT if platform is only USB3 ......................................................................

Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/43771/1/src/mainboard/google/voltee... File src/mainboard/google/volteer/romstage.c:

https://review.coreboot.org/c/coreboot/+/43771/1/src/mainboard/google/voltee... PS1, Line 39: }

...

Yes, I was referring to the USB4 controllers and the DMA controllers in the device tree. (07.0-07. […]

I can add the DMA controllers to this...is there a way to override devicetree for only a certain FW_CONFIG is there is no driver attached? I am not aware of one and thes mem_cfg settings should accomplish the same thing

Brandon Breitenstein (Code Review)

28 Jul 28 Jul

8:49 p.m.

Hello build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/43771

to look at the new patch set (#2).

Change subject: mb/volteer: Disable TBT if platform is only USB3 ......................................................................

mb/volteer: Disable TBT if platform is only USB3

BUG=NONE BRANCH=NONE TEST=Built coreboot and verified that TBT was disabled on platform with USB3 DB and enabled on platform with USB4/TBT DB

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/43771/2

Brandon Breitenstein (Code Review)

8:51 p.m.

Brandon Breitenstein has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43771 )

Change subject: mb/volteer: Disable TBT if platform is only USB3 ......................................................................

Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/43771/1/src/mainboard/google/voltee... File src/mainboard/google/volteer/romstage.c:

https://review.coreboot.org/c/coreboot/+/43771/1/src/mainboard/google/voltee... PS1, Line 39: }

...

I can add the DMA controllers to this... […]

while I do not believe it is necessary to turn off the DMAs in this case I have turned them both to off if the platform is USB3

Tim Wawrzynczak (Code Review)

31 Jul 31 Jul

8:35 p.m.

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43771 )

Change subject: mb/volteer: Disable TBT if platform is only USB3 ......................................................................

Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/43771/2/src/mainboard/google/voltee... File src/mainboard/google/volteer/romstage.c:

https://review.coreboot.org/c/coreboot/+/43771/2/src/mainboard/google/voltee... PS2, Line 34: /* If the DB is USB3 disable TBT on the platform */ : if (fw_config_probe(FW_CONFIG(DB_USB, USB3_ACTIVE)) || : fw_config_probe(FW_CONFIG(DB_USB, USB3_PASSIVE))) { : mem_cfg->TcssItbtPcie0En = 0; : mem_cfg->TcssItbtPcie1En = 0; : mem_cfg->TcssDma0En = 0; : mem_cfg->TcssDma1En = 0; : } This whole thing can be replaced by probe statements in the baseboard devicetree:

``` device pci 07.0 on probe DB_USB USB4_GEN2 probe DB_USB USB4_GEN3 end device pci 07.1 on probe DB_USB USB4_GEN2 probe DB_USB USB4_GEN3 end ```

and the same with the DMA controllers

Nick Vaccaro (Code Review)

3 Aug 3 Aug

6:38 p.m.

Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43771 )

Change subject: mb/volteer: Disable TBT if platform is only USB3 ......................................................................

Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/43771/2//COMMIT_MSG Commit Message:

https://review.coreboot.org/c/coreboot/+/43771/2//COMMIT_MSG@7 PS2, Line 7: mb/volteer mb/google/volteer

Brandon Breitenstein (Code Review)

4 Aug 4 Aug

11:09 p.m.

Brandon Breitenstein has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43771 )

Change subject: mb/volteer: Disable TBT if platform is only USB3 ......................................................................

Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/43771/2/src/mainboard/google/voltee... File src/mainboard/google/volteer/romstage.c:

...

This whole thing can be replaced by probe statements in the baseboard devicetree: […]

Does it matter where this is done? I can move it to the devicetree but both of these accomplish the same goal

-- To view, visit https://review.coreboot.org/c/coreboot/+/43771 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I594f2e9483aaf896de2b6aea9a3460bd3826c58c Gerrit-Change-Number: 43771 Gerrit-PatchSet: 2 Gerrit-Owner: Brandon Breitenstein brandon.breitenstein@intel.com Gerrit-Reviewer: Caveh Jalali caveh@chromium.org Gerrit-Reviewer: Duncan Laurie dlaurie@chromium.org Gerrit-Reviewer: Nick Vaccaro nvaccaro@google.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Divya S Sasidharan divya.s.sasidharan@intel.com Gerrit-CC: Furquan Shaikh furquan@google.com Gerrit-CC: Kane Chen kane.chen@intel.com Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-CC: Tim Wawrzynczak twawrzynczak@chromium.org Gerrit-Comment-Date: Tue, 04 Aug 2020 23:09:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak twawrzynczak@chromium.org Gerrit-MessageType: comment

Brandon Breitenstein (Code Review)

11:09 p.m.

New subject: Change in coreboot[master]: mb/google/volteer: Disable TBT if platform is only USB3

Hello build bot (Jenkins), Caveh Jalali, Duncan Laurie, Nick Vaccaro,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/43771

to look at the new patch set (#3).

Change subject: mb/google/volteer: Disable TBT if platform is only USB3 ......................................................................

mb/google/volteer: Disable TBT if platform is only USB3

BUG=NONE BRANCH=NONE TEST=Built coreboot and verified that TBT was disabled on platform with USB3 DB and enabled on platform with USB4/TBT DB

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/43771/3

Caveh Jalali (Code Review)

11:24 p.m.

New subject: Change in coreboot[master]: mb/google/volteer: Disable TBT if platform is only USB3

Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43771 )

Change subject: mb/google/volteer: Disable TBT if platform is only USB3 ......................................................................

Patch Set 3:

(1 comment)

https://review.coreboot.org/c/coreboot/+/43771/2/src/mainboard/google/voltee... File src/mainboard/google/volteer/romstage.c:

...

Does it matter where this is done? I can move it to the devicetree but both of these accomplish the […]

the thing to check is whether anything depends on this configuration before the device tree params are applied. for example, PchHdaEnable disable is done in this section quite deliberately to disable some initialization.

-- To view, visit https://review.coreboot.org/c/coreboot/+/43771 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I594f2e9483aaf896de2b6aea9a3460bd3826c58c Gerrit-Change-Number: 43771 Gerrit-PatchSet: 3 Gerrit-Owner: Brandon Breitenstein brandon.breitenstein@intel.com Gerrit-Reviewer: Caveh Jalali caveh@chromium.org Gerrit-Reviewer: Duncan Laurie dlaurie@chromium.org Gerrit-Reviewer: Nick Vaccaro nvaccaro@google.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Divya S Sasidharan divya.s.sasidharan@intel.com Gerrit-CC: Furquan Shaikh furquan@google.com Gerrit-CC: Kane Chen kane.chen@intel.com Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-CC: Tim Wawrzynczak twawrzynczak@chromium.org Gerrit-Comment-Date: Tue, 04 Aug 2020 23:24:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak twawrzynczak@chromium.org Comment-In-Reply-To: Brandon Breitenstein brandon.breitenstein@intel.com Gerrit-MessageType: comment

Brandon Breitenstein (Code Review)

5 Aug 5 Aug

10:17 p.m.

New subject: Change in coreboot[master]: mb/google/volteer: Disable TBT if platform is only USB3

Brandon Breitenstein has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43771 )

Change subject: mb/google/volteer: Disable TBT if platform is only USB3 ......................................................................

Patch Set 3:

(1 comment)

https://review.coreboot.org/c/coreboot/+/43771/2/src/mainboard/google/voltee... File src/mainboard/google/volteer/romstage.c:

...

the thing to check is whether anything depends on this configuration […]

makes sense...I will move it to devicetree and have it as always disabled unless USB4 is supported

-- To view, visit https://review.coreboot.org/c/coreboot/+/43771 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I594f2e9483aaf896de2b6aea9a3460bd3826c58c Gerrit-Change-Number: 43771 Gerrit-PatchSet: 3 Gerrit-Owner: Brandon Breitenstein brandon.breitenstein@intel.com Gerrit-Reviewer: Caveh Jalali caveh@chromium.org Gerrit-Reviewer: Duncan Laurie dlaurie@chromium.org Gerrit-Reviewer: Nick Vaccaro nvaccaro@google.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Divya S Sasidharan divya.s.sasidharan@intel.com Gerrit-CC: Furquan Shaikh furquan@google.com Gerrit-CC: Kane Chen kane.chen@intel.com Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-CC: Tim Wawrzynczak twawrzynczak@chromium.org Gerrit-Comment-Date: Wed, 05 Aug 2020 22:17:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Caveh Jalali caveh@chromium.org Comment-In-Reply-To: Tim Wawrzynczak twawrzynczak@chromium.org Comment-In-Reply-To: Brandon Breitenstein brandon.breitenstein@intel.com Gerrit-MessageType: comment

Brandon Breitenstein (Code Review)

6 Aug 6 Aug

10:22 p.m.

New subject: Change in coreboot[master]: mb/google/volteer: Only enable TBT root ports if USB4 is supported

Hello build bot (Jenkins), Caveh Jalali, Duncan Laurie, Nick Vaccaro,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/43771

to look at the new patch set (#4).

Change subject: mb/google/volteer: Only enable TBT root ports if USB4 is supported ......................................................................

mb/google/volteer: Only enable TBT root ports if USB4 is supported

TBT ports should be disabled if the DB is a USB3 DB. It is assumed if the DB doesn't support USB4 the platform as a whole should only be USB3 capable and TBT functionality on both ports should not be enabled.

BUG=NONE BRANCH=NONE TEST=Built coreboot and verified that TBT was disabled on platform with USB3 DB and enabled on platform with USB4/TBT DB

Change-Id: I594f2e9483aaf896de2b6aea9a3460bd3826c58c Signed-off-by: Brandon Breitenstein brandon.breitenstein@intel.com --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 12 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/43771/4

Tim Wawrzynczak (Code Review)

7 Aug 7 Aug

4:25 p.m.

New subject: Change in coreboot[master]: mb/google/volteer: Only enable TBT root ports if USB4 is supported

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43771 )

Change subject: mb/google/volteer: Only enable TBT root ports if USB4 is supported ......................................................................

Patch Set 4: Code-Review+2

-- To view, visit https://review.coreboot.org/c/coreboot/+/43771 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I594f2e9483aaf896de2b6aea9a3460bd3826c58c Gerrit-Change-Number: 43771 Gerrit-PatchSet: 4 Gerrit-Owner: Brandon Breitenstein brandon.breitenstein@intel.com Gerrit-Reviewer: Caveh Jalali caveh@chromium.org Gerrit-Reviewer: Duncan Laurie dlaurie@chromium.org Gerrit-Reviewer: Nick Vaccaro nvaccaro@google.com Gerrit-Reviewer: Tim Wawrzynczak twawrzynczak@chromium.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Divya S Sasidharan divya.s.sasidharan@intel.com Gerrit-CC: Furquan Shaikh furquan@google.com Gerrit-CC: Kane Chen kane.chen@intel.com Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Fri, 07 Aug 2020 16:25:47 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Brandon Breitenstein (Code Review)

13 Aug 13 Aug

10:32 p.m.

New subject: Change in coreboot[master]: mb/google/volteer: Only enable TBT root ports if USB4 is supported

Brandon Breitenstein has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43771 )

Change subject: mb/google/volteer: Only enable TBT root ports if USB4 is supported ......................................................................

Patch Set 4: Code-Review+2

-- To view, visit https://review.coreboot.org/c/coreboot/+/43771 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I594f2e9483aaf896de2b6aea9a3460bd3826c58c Gerrit-Change-Number: 43771 Gerrit-PatchSet: 4 Gerrit-Owner: Brandon Breitenstein brandon.breitenstein@intel.com Gerrit-Reviewer: Brandon Breitenstein brandon.breitenstein@intel.com Gerrit-Reviewer: Caveh Jalali caveh@chromium.org Gerrit-Reviewer: Duncan Laurie dlaurie@chromium.org Gerrit-Reviewer: Nick Vaccaro nvaccaro@google.com Gerrit-Reviewer: Ravishankar Sarawadi ravishankar.sarawadi@intel.com Gerrit-Reviewer: Tim Wawrzynczak twawrzynczak@chromium.org Gerrit-Reviewer: Wonkyu Kim wonkyu.kim@intel.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Divya S Sasidharan divya.s.sasidharan@intel.com Gerrit-CC: Furquan Shaikh furquan@google.com Gerrit-CC: Kane Chen kane.chen@intel.com Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Thu, 13 Aug 2020 22:32:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Duncan Laurie (Code Review)

14 Aug 14 Aug

4:01 p.m.

New subject: Change in coreboot[master]: mb/google/volteer: Only enable TBT root ports if USB4 is supported

Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43771 )

Change subject: mb/google/volteer: Only enable TBT root ports if USB4 is supported ......................................................................

Patch Set 4:

(1 comment)

https://review.coreboot.org/c/coreboot/+/43771/2/src/mainboard/google/voltee... File src/mainboard/google/volteer/romstage.c:

...

makes sense... […]

Marking resolved so I can submit as I have a patch that goes on top of this.

-- To view, visit https://review.coreboot.org/c/coreboot/+/43771 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I594f2e9483aaf896de2b6aea9a3460bd3826c58c Gerrit-Change-Number: 43771 Gerrit-PatchSet: 4 Gerrit-Owner: Brandon Breitenstein brandon.breitenstein@intel.com Gerrit-Reviewer: Brandon Breitenstein brandon.breitenstein@intel.com Gerrit-Reviewer: Caveh Jalali caveh@chromium.org Gerrit-Reviewer: Duncan Laurie dlaurie@chromium.org Gerrit-Reviewer: Nick Vaccaro nvaccaro@google.com Gerrit-Reviewer: Ravishankar Sarawadi ravishankar.sarawadi@intel.com Gerrit-Reviewer: Tim Wawrzynczak twawrzynczak@chromium.org Gerrit-Reviewer: Wonkyu Kim wonkyu.kim@intel.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Divya S Sasidharan divya.s.sasidharan@intel.com Gerrit-CC: Furquan Shaikh furquan@google.com Gerrit-CC: Kane Chen kane.chen@intel.com Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Fri, 14 Aug 2020 16:01:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Caveh Jalali caveh@chromium.org Comment-In-Reply-To: Tim Wawrzynczak twawrzynczak@chromium.org Comment-In-Reply-To: Brandon Breitenstein brandon.breitenstein@intel.com Gerrit-MessageType: comment

Duncan Laurie (Code Review)

4:02 p.m.

New subject: Change in coreboot[master]: mb/google/volteer: Only enable TBT root ports if USB4 is supported

Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43771 )

Change subject: mb/google/volteer: Only enable TBT root ports if USB4 is supported ......................................................................

Patch Set 4:

(1 comment)

https://review.coreboot.org/c/coreboot/+/43771/2//COMMIT_MSG Commit Message:

https://review.coreboot.org/c/coreboot/+/43771/2//COMMIT_MSG@7 PS2, Line 7: mb/volteer

...

mb/google/volteer

Done

-- To view, visit https://review.coreboot.org/c/coreboot/+/43771 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I594f2e9483aaf896de2b6aea9a3460bd3826c58c Gerrit-Change-Number: 43771 Gerrit-PatchSet: 4 Gerrit-Owner: Brandon Breitenstein brandon.breitenstein@intel.com Gerrit-Reviewer: Brandon Breitenstein brandon.breitenstein@intel.com Gerrit-Reviewer: Caveh Jalali caveh@chromium.org Gerrit-Reviewer: Duncan Laurie dlaurie@chromium.org Gerrit-Reviewer: Nick Vaccaro nvaccaro@google.com Gerrit-Reviewer: Ravishankar Sarawadi ravishankar.sarawadi@intel.com Gerrit-Reviewer: Tim Wawrzynczak twawrzynczak@chromium.org Gerrit-Reviewer: Wonkyu Kim wonkyu.kim@intel.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Divya S Sasidharan divya.s.sasidharan@intel.com Gerrit-CC: Furquan Shaikh furquan@google.com Gerrit-CC: Kane Chen kane.chen@intel.com Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Fri, 14 Aug 2020 16:02:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nick Vaccaro nvaccaro@google.com Gerrit-MessageType: comment

Duncan Laurie (Code Review)

4:03 p.m.

New subject: Change in coreboot[master]: mb/google/volteer: Only enable TBT root ports if USB4 is supported

Duncan Laurie has submitted this change. ( https://review.coreboot.org/c/coreboot/+/43771 )

Change subject: mb/google/volteer: Only enable TBT root ports if USB4 is supported ......................................................................

mb/google/volteer: Only enable TBT root ports if USB4 is supported

BUG=NONE BRANCH=NONE TEST=Built coreboot and verified that TBT was disabled on platform with USB3 DB and enabled on platform with USB4/TBT DB

Change-Id: I594f2e9483aaf896de2b6aea9a3460bd3826c58c Signed-off-by: Brandon Breitenstein brandon.breitenstein@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/43771 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 12 insertions(+), 3 deletions(-)

Approvals: build bot (Jenkins): Verified Brandon Breitenstein: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved

diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index 53bbe5a..57ab9e4 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -381,8 +381,14 @@ end # DPTF 0x9A03 device pci 05.0 off end # IPU 0x9A19 device pci 06.0 off end # PEG60 0x9A09 - device pci 07.0 on end # TBT_PCIe0 0x9A23 - device pci 07.1 on end # TBT_PCIe1 0x9A25 + device pci 07.0 on # TBT_PCIe0 0x9A23 + probe DB_USB USB4_GEN2 + probe DB_USB USB4_GEN3 + end + device pci 07.1 on # TBT_PCIe1 0x9A25 + probe DB_USB USB4_GEN2 + probe DB_USB USB4_GEN3 + end device pci 07.2 off end # TBT_PCIe2 0x9A27 device pci 07.3 off end # TBT_PCIe3 0x9A29 device pci 08.0 on end # GNA 0x9A11 @@ -390,7 +396,10 @@ device pci 0a.0 off end # Crash-log SRAM 0x9A0D device pci 0d.0 on end # USB xHCI 0x9A13 device pci 0d.1 off end # USB xDCI (OTG) 0x9A15 - device pci 0d.2 on end # TBT DMA0 0x9A1B + device pci 0d.2 on # TBT DMA0 0x9A1B + probe DB_USB USB4_GEN2 + probe DB_USB USB4_GEN3 + end device pci 0d.3 off end # TBT DMA1 0x9A1D device pci 0e.0 off end # VMD 0x9A0B

-- To view, visit https://review.coreboot.org/c/coreboot/+/43771 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I594f2e9483aaf896de2b6aea9a3460bd3826c58c Gerrit-Change-Number: 43771 Gerrit-PatchSet: 5 Gerrit-Owner: Brandon Breitenstein brandon.breitenstein@intel.com Gerrit-Reviewer: Brandon Breitenstein brandon.breitenstein@intel.com Gerrit-Reviewer: Caveh Jalali caveh@chromium.org Gerrit-Reviewer: Duncan Laurie dlaurie@chromium.org Gerrit-Reviewer: Nick Vaccaro nvaccaro@google.com Gerrit-Reviewer: Ravishankar Sarawadi ravishankar.sarawadi@intel.com Gerrit-Reviewer: Tim Wawrzynczak twawrzynczak@chromium.org Gerrit-Reviewer: Wonkyu Kim wonkyu.kim@intel.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Divya S Sasidharan divya.s.sasidharan@intel.com Gerrit-CC: Furquan Shaikh furquan@google.com Gerrit-CC: Kane Chen kane.chen@intel.com Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-MessageType: merged

Nick Vaccaro (Code Review)

4:36 p.m.

New subject: Change in coreboot[master]: mb/google/volteer: Only enable TBT root ports if USB4 is supported

Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43771 )

Change subject: mb/google/volteer: Only enable TBT root ports if USB4 is supported ......................................................................

Patch Set 5: Code-Review+2

-- To view, visit https://review.coreboot.org/c/coreboot/+/43771 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I594f2e9483aaf896de2b6aea9a3460bd3826c58c Gerrit-Change-Number: 43771 Gerrit-PatchSet: 5 Gerrit-Owner: Brandon Breitenstein brandon.breitenstein@intel.com Gerrit-Reviewer: Brandon Breitenstein brandon.breitenstein@intel.com Gerrit-Reviewer: Caveh Jalali caveh@chromium.org Gerrit-Reviewer: Duncan Laurie dlaurie@chromium.org Gerrit-Reviewer: Nick Vaccaro nvaccaro@google.com Gerrit-Reviewer: Ravishankar Sarawadi ravishankar.sarawadi@intel.com Gerrit-Reviewer: Tim Wawrzynczak twawrzynczak@chromium.org Gerrit-Reviewer: Wonkyu Kim wonkyu.kim@intel.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: 9elements QA hardwaretestrobot@gmail.com Gerrit-CC: Divya S Sasidharan divya.s.sasidharan@intel.com Gerrit-CC: Furquan Shaikh furquan@google.com Gerrit-CC: Kane Chen kane.chen@intel.com Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Fri, 14 Aug 2020 16:36:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Brandon Breitenstein (Code Review)
Caveh Jalali (Code Review)
Duncan Laurie (Code Review)
Furquan Shaikh (Code Review)
Nick Vaccaro (Code Review)
Tim Wawrzynczak (Code Review)