Hello Selma Bensaid,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/48060
to review the following change.
Change subject: include/device/pci_ids.h: Fix device id for gspi2 ......................................................................
include/device/pci_ids.h: Fix device id for gspi2
Device ID for "D18:F6 - GSPI #2" shoud be 0xA0FB
BUG=none TEST=Boot to OS, verify SSDT
Signed-off-by: Selma BENSAID selma.bensaid@intel.com Signed-off-by: Bora Guvendik bora.guvendik@intel.com Change-Id: I0d814170d24ff1b989eceb1d9ebdf6134df85e2e --- M src/include/device/pci_ids.h 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/48060/1
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index c123002..51c0abf 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3563,7 +3563,7 @@ #define PCI_DEVICE_ID_INTEL_TGP_SPI0 0xa0a4 #define PCI_DEVICE_ID_INTEL_TGP_GSPI0 0xa0aa #define PCI_DEVICE_ID_INTEL_TGP_GSPI1 0xa0ab -#define PCI_DEVICE_ID_INTEL_TGP_GSPI2 0x34fb +#define PCI_DEVICE_ID_INTEL_TGP_GSPI2 0xa0fb #define PCI_DEVICE_ID_INTEL_TGP_GSPI3 0xa0fd #define PCI_DEVICE_ID_INTEL_TGP_GSPI4 0xa0fe #define PCI_DEVICE_ID_INTEL_TGP_GSPI5 0xa0de
Selma Bensaid has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48060 )
Change subject: include/device/pci_ids.h: Fix device id for gspi2 ......................................................................
Patch Set 1: Code-Review+1
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48060 )
Change subject: include/device/pci_ids.h: Fix device id for gspi2 ......................................................................
Patch Set 1: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/48060 )
Change subject: include/device/pci_ids.h: Fix device id for gspi2 ......................................................................
include/device/pci_ids.h: Fix device id for gspi2
Device ID for "D18:F6 - GSPI #2" shoud be 0xA0FB
BUG=none TEST=Boot to OS, verify SSDT
Signed-off-by: Selma BENSAID selma.bensaid@intel.com Signed-off-by: Bora Guvendik bora.guvendik@intel.com Change-Id: I0d814170d24ff1b989eceb1d9ebdf6134df85e2e Reviewed-on: https://review.coreboot.org/c/coreboot/+/48060 Reviewed-by: Furquan Shaikh furquan@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/include/device/pci_ids.h 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Selma Bensaid: Looks good to me, but someone else must approve
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index c123002..51c0abf 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3563,7 +3563,7 @@ #define PCI_DEVICE_ID_INTEL_TGP_SPI0 0xa0a4 #define PCI_DEVICE_ID_INTEL_TGP_GSPI0 0xa0aa #define PCI_DEVICE_ID_INTEL_TGP_GSPI1 0xa0ab -#define PCI_DEVICE_ID_INTEL_TGP_GSPI2 0x34fb +#define PCI_DEVICE_ID_INTEL_TGP_GSPI2 0xa0fb #define PCI_DEVICE_ID_INTEL_TGP_GSPI3 0xa0fd #define PCI_DEVICE_ID_INTEL_TGP_GSPI4 0xa0fe #define PCI_DEVICE_ID_INTEL_TGP_GSPI5 0xa0de
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Bora Guvendik (Code Review) -
Furquan Shaikh (Code Review)
-
Patrick Georgi (Code Review)
-
Selma Bensaid (Code Review)