[L] Change in coreboot[main]: vc/intel/fsp/ptl: Update header files from FSP 3071_00 to FSP 3103_05

[Subrata Banik (Code Review)]

Attention is currently required from: Alok Agarwal, Intel coreboot Reviewers, Jayvik Desai, Jérémy Compostella, Kapil Porwal, Pranava Y N, Ronak Kanabar, [e-mail].

Subrata Banik has posted comments on this change by Alok Agarwal. ( https://review.coreboot.org/c/coreboot/+/87000?usp=email )

Change subject: vc/intel/fsp/ptl: Update header files from FSP 3071_00 to FSP 3103_05
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Patch Set 6:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/87000/comment/b752b572_f78f4e8d?usp... :
PS6, Line 13: Updating UPD Offset in FspmUpd.h and FspsUpd.h
            : - Updated  MemInfoHob.h : Update MEMORY_INFO_DATA_HOB, child structures
            :   and their data for SMBIOS type 16/17 design change
            : - Updating soc/intel/pantherlake/romstage/romstage.c:  Refactor
            :   coreboot to match MEMORY_INFO_DATA_HOB data structure
> Please be consistent for the verbs. (I’d use imperative mood.)

need to rewrite this commit msg now because romstage.c changes are also part of same CL. therefore, we shouldn't see any build errors.