Change in coreboot[master]: mb/lenovo/{t420,t420s}: Convert to variant board - coreboot-gerrit

14 Apr 2020

Peter Lemenkov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40381 )
Change subject: mb/lenovo/{t420,t420s}: Convert to variant board
......................................................................
mb/lenovo/{t420,t420s}: Convert to variant board
Change-Id: If117c48cf8e6131b3d25112346d4ddd1ff366009
Signed-off-by: Peter Lemenkov lemenkov@gmail.com
---
M src/mainboard/lenovo/t420/Kconfig
M src/mainboard/lenovo/t420/Kconfig.name
M src/mainboard/lenovo/t420/Makefile.inc
M src/mainboard/lenovo/t420/board_info.txt
M src/mainboard/lenovo/t420/devicetree.cb
M src/mainboard/lenovo/t420/early_init.c
M src/mainboard/lenovo/t420/gma-mainboard.ads
M src/mainboard/lenovo/t420/hda_verb.c
A src/mainboard/lenovo/t420/variants/t420/board_info.txt
R src/mainboard/lenovo/t420/variants/t420/data.vbt
A src/mainboard/lenovo/t420/variants/t420/early_init.c
R src/mainboard/lenovo/t420/variants/t420/gpio.c
A src/mainboard/lenovo/t420/variants/t420/hda_verb.c
A src/mainboard/lenovo/t420/variants/t420/overridetree.cb
R src/mainboard/lenovo/t420/variants/t420s/board_info.txt
R src/mainboard/lenovo/t420/variants/t420s/data.vbt
A src/mainboard/lenovo/t420/variants/t420s/early_init.c
R src/mainboard/lenovo/t420/variants/t420s/gpio.c
R src/mainboard/lenovo/t420/variants/t420s/hda_verb.c
A src/mainboard/lenovo/t420/variants/t420s/overridetree.cb
D src/mainboard/lenovo/t420s/Kconfig
D src/mainboard/lenovo/t420s/Kconfig.name
D src/mainboard/lenovo/t420s/Makefile.inc
D src/mainboard/lenovo/t420s/acpi/ec.asl
D src/mainboard/lenovo/t420s/acpi/platform.asl
D src/mainboard/lenovo/t420s/acpi/superio.asl
D src/mainboard/lenovo/t420s/acpi_tables.c
D src/mainboard/lenovo/t420s/cmos.default
D src/mainboard/lenovo/t420s/cmos.layout
D src/mainboard/lenovo/t420s/devicetree.cb
D src/mainboard/lenovo/t420s/dsdt.asl
D src/mainboard/lenovo/t420s/early_init.c
D src/mainboard/lenovo/t420s/gma-mainboard.ads
D src/mainboard/lenovo/t420s/mainboard.c
D src/mainboard/lenovo/t420s/smihandler.c
D src/mainboard/lenovo/t420s/vboot-ro-me_clean.fmd
D src/mainboard/lenovo/t420s/vboot-ro.fmd
D src/mainboard/lenovo/t420s/vboot-rwa.fmd
38 files changed, 150 insertions(+), 853 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/40381/1

diff --git a/src/mainboard/lenovo/t420/Kconfig b/src/mainboard/lenovo/t420/Kconfig
index dfc8ed1..b0523f6 100644
--- a/src/mainboard/lenovo/t420/Kconfig
+++ b/src/mainboard/lenovo/t420/Kconfig
@@ -1,4 +1,4 @@
-if BOARD_LENOVO_T420
+if BOARD_LENOVO_T420 || BOARD_LENOVO_T420S
config BOARD_SPECIFIC_OPTIONS
    def_bool y
@@ -16,7 +16,7 @@
    select HAVE_CMOS_DEFAULT
    select HAVE_ACPI_RESUME
    select INTEL_INT15
-	select DRIVERS_RICOH_RCE822
+	select DRIVERS_RICOH_RCE822 if BOARD_LENOVO_T420
    select MAINBOARD_HAS_LPC_TPM
    select MAINBOARD_HAS_TPM1
    select MAINBOARD_HAS_LIBGFXINIT
@@ -51,9 +51,19 @@
    string
    default "lenovo/t420"
+config VARIANT_DIR
+	string
+	default "t420" if BOARD_LENOVO_T420
+	default "t420s" if BOARD_LENOVO_T420S
+
+config OVERRIDE_DEVICETREE
+	string
+	default "variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+
 config MAINBOARD_PART_NUMBER
    string
-	default "ThinkPad T420"
+	default "ThinkPad T420" if BOARD_LENOVO_T420
+	default "ThinkPad T420s" if BOARD_LENOVO_T420S
config MAX_CPUS
    int
@@ -81,4 +91,4 @@
 config PS2M_EISAID
    default "LEN0015"
-endif # BOARD_LENOVO_T420
+endif # BOARD_LENOVO_T420 || BOARD_LENOVO_T420S
diff --git a/src/mainboard/lenovo/t420/Kconfig.name b/src/mainboard/lenovo/t420/Kconfig.name
index 75570ad..c43ec9d 100644
--- a/src/mainboard/lenovo/t420/Kconfig.name
+++ b/src/mainboard/lenovo/t420/Kconfig.name
@@ -1,2 +1,5 @@
 config BOARD_LENOVO_T420
    bool "ThinkPad T420"
+
+config BOARD_LENOVO_T420S
+	bool "ThinkPad T420s"
diff --git a/src/mainboard/lenovo/t420/Makefile.inc b/src/mainboard/lenovo/t420/Makefile.inc
index 05befdd..df5ca02 100644
--- a/src/mainboard/lenovo/t420/Makefile.inc
+++ b/src/mainboard/lenovo/t420/Makefile.inc
@@ -15,7 +15,9 @@
 smm-y += smihandler.c
 bootblock-y += gpio.c
 romstage-y += gpio.c
-
+ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
 ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+bootblock-y += variants/$(VARIANT_DIR)/early_init.c
 bootblock-y += early_init.c
+romstage-y += variants/$(VARIANT_DIR)/early_init.c
 romstage-y += early_init.c
diff --git a/src/mainboard/lenovo/t420/board_info.txt b/src/mainboard/lenovo/t420/board_info.txt
index c0f04ca..05146ff 100644
--- a/src/mainboard/lenovo/t420/board_info.txt
+++ b/src/mainboard/lenovo/t420/board_info.txt
@@ -1,3 +1,5 @@
+Vendor name: Lenovo
+Board name: ThinkPad T420 baseboard
 Category: laptop
 ROM package: SOIC-8 / WSON-8
 ROM protocol: SPI
diff --git a/src/mainboard/lenovo/t420/devicetree.cb b/src/mainboard/lenovo/t420/devicetree.cb
index 5ac9cf5..ec4a57a 100644
--- a/src/mainboard/lenovo/t420/devicetree.cb
+++ b/src/mainboard/lenovo/t420/devicetree.cb
@@ -82,13 +82,7 @@
    		device pci 1c.3 on
    			smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
    		end # PCIe Port #4 ExpressCard
-			device pci 1c.4 on
-				chip drivers/ricoh/rce822
-					register "sdwppol" = "1"
-					register "disable_mask" = "0x87"
-					device pci 00.0 on end
-				end
-			end # PCIe Port #5 (Ricoh SD & FW)
+			device pci 1c.4 on end # PCIe Port #5
    		device pci 1c.5 off end # PCIe Port #6 Intel Gigabit Ethernet PHY (not PCIe)
    		device pci 1c.6 off end # PCIe Port #7
    		device pci 1c.7 off end # PCIe Port #8
diff --git a/src/mainboard/lenovo/t420/early_init.c b/src/mainboard/lenovo/t420/early_init.c
index 6c189f4..7a06bf0 100644
--- a/src/mainboard/lenovo/t420/early_init.c
+++ b/src/mainboard/lenovo/t420/early_init.c
@@ -34,24 +34,6 @@
    pci_write_config32(PCI_DEV(0, 0, 0), DEVEN, reg32);
 }
-// OC3 set in BIOS to port 2-7, OC7 set in BIOS to port 10-13
-const struct southbridge_usb_port mainboard_usb_ports[] = {
-	{ 1, 1,  0 }, /* P0: system port 4, OC0 */
-	{ 1, 1,  1 }, /* P1: system port 2 (EHCI debug), OC 1 */
-	{ 1, 1, -1 }, /* P2: HALF MINICARD (WLAN) no oc */
-	{ 1, 0, -1 }, /* P3: WWAN, no OC */
-	{ 1, 0, -1 }, /* P4: smartcard, no OC */
-	{ 1, 1, -1 }, /* P5: ExpressCard, no OC */
-	{ 0, 0, -1 }, /* P6: empty */
-	{ 0, 0, -1 }, /* P7: empty */
-	{ 1, 1,  4 }, /* P8: system port 3, OC4*/
-	{ 1, 1,  5 }, /* P9: system port 1 (EHCI debug), OC 5 */
-	{ 1, 0, -1 }, /* P10: fingerprint reader, no OC */
-	{ 1, 0, -1 }, /* P11: bluetooth, no OC. */
-	{ 1, 1, -1 }, /* P12: docking, no OC */
-	{ 1, 1, -1 }, /* P13: camera (LCD), no OC */
-};
-
 void mainboard_get_spd(spd_raw_data *spd, bool id_only)
 {
    read_spd(&spd[0], 0x50, id_only);
diff --git a/src/mainboard/lenovo/t420/gma-mainboard.ads b/src/mainboard/lenovo/t420/gma-mainboard.ads
index a26b993..fae3544 100644
--- a/src/mainboard/lenovo/t420/gma-mainboard.ads
+++ b/src/mainboard/lenovo/t420/gma-mainboard.ads
@@ -1,4 +1,4 @@
--- SPDX-License-Identifier: GPL-2.0-only
+-- SPDX-License-Identifier: GPL-2.0-or-later
 -- This file is part of the coreboot project.
with HW.GFX.GMA;
diff --git a/src/mainboard/lenovo/t420/hda_verb.c b/src/mainboard/lenovo/t420/hda_verb.c
index 690c936..2997587 100644
--- a/src/mainboard/lenovo/t420/hda_verb.c
+++ b/src/mainboard/lenovo/t420/hda_verb.c
@@ -1,45 +1 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
-
-/* Bits 31:28 - Codec Address */
-/* Bits 27:20 - NID */
-/* Bits 19:8 - Verb ID */
-/* Bits 7:0  - Payload */
-
-#include <device/azalia_device.h>
-
-const u32 cim_verb_data[] = {
-	0x14f1506e,	/* Codec VID / DID: Conexant CX20590 - schematic shows CX20672 */
-	0x17aa21ce,	/* Subsystem ID */
-	13,		/* Number of 4 dword sets */
-	AZALIA_SUBVENDOR(0, 0x17aa21d2),
-	AZALIA_PIN_CFG(0, 0x12, 0x90a60140),
-	AZALIA_PIN_CFG(0, 0x14, 0x90170110),
-	AZALIA_PIN_CFG(0, 0x15, 0x03211020),
-	AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
-	AZALIA_PIN_CFG(0, 0x18, 0x03a11830),
-	AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
-	AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
-	AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
-	AZALIA_PIN_CFG(0, 0x1d, 0x40138205),
-	AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
-
-	/* Misc entries */
-		0x00b707C0, /* Enable PortB as Output with HP amp */
-		0x00d70740, /* Enable PortD as Output */
-		0x0017a200, /* Disable ClkEn of PortSenseTst */
-		0x0017c621, /* Slave Port - Port A used as microphone input for
-		                            combo Jack
-		               Master Port - Port B used for Jack Presence Detect
-		               Enable Combo Jack Detection */
-		0x0017a208, /* Enable ClkEn of PortSenseTst */
-		0x00170500, /* Set power state to D0 */
-		0x00170500, /* Padding */
-		0x00170500, /* Padding */
-};
-
-const u32 pc_beep_verbs[] = {
-	0x02177a00, /* Digital PCBEEP Gain: 0h=-9db, 1h=-6db ... 4h=+3db, 5h=+6db */
-};
-
-AZALIA_ARRAY_SIZES;
+/* dummy */
diff --git a/src/mainboard/lenovo/t420/variants/t420/board_info.txt b/src/mainboard/lenovo/t420/variants/t420/board_info.txt
new file mode 100644
index 0000000..c0f04ca
--- /dev/null
+++ b/src/mainboard/lenovo/t420/variants/t420/board_info.txt
@@ -0,0 +1,6 @@
+Category: laptop
+ROM package: SOIC-8 / WSON-8
+ROM protocol: SPI
+ROM socketed: n
+Flashrom support: n
+Release year: 2011
diff --git a/src/mainboard/lenovo/t420/data.vbt b/src/mainboard/lenovo/t420/variants/t420/data.vbt
similarity index 100%
rename from src/mainboard/lenovo/t420/data.vbt
rename to src/mainboard/lenovo/t420/variants/t420/data.vbt
Binary files differ
diff --git a/src/mainboard/lenovo/t420/variants/t420/early_init.c b/src/mainboard/lenovo/t420/variants/t420/early_init.c
new file mode 100644
index 0000000..4b71060
--- /dev/null
+++ b/src/mainboard/lenovo/t420/variants/t420/early_init.c
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/* This file is part of the coreboot project. */
+
+#include <southbridge/intel/bd82x6x/pch.h>
+
+// OC3 set in BIOS to port 2-7, OC7 set in BIOS to port 10-13
+const struct southbridge_usb_port mainboard_usb_ports[] = {
+	{ 1, 1,  0 }, /* P0: system port 4, OC0 */
+	{ 1, 1,  1 }, /* P1: system port 2 (EHCI debug), OC 1 */
+	{ 1, 1, -1 }, /* P2: HALF MINICARD (WLAN) no oc */
+	{ 1, 0, -1 }, /* P3: WWAN, no OC */
+	{ 1, 0, -1 }, /* P4: smartcard, no OC */
+	{ 1, 1, -1 }, /* P5: ExpressCard, no OC */
+	{ 0, 0, -1 }, /* P6: empty */
+	{ 0, 0, -1 }, /* P7: empty */
+	{ 1, 1,  4 }, /* P8: system port 3, OC4*/
+	{ 1, 1,  5 }, /* P9: system port 1 (EHCI debug), OC 5 */
+	{ 1, 0, -1 }, /* P10: fingerprint reader, no OC */
+	{ 1, 0, -1 }, /* P11: bluetooth, no OC. */
+	{ 1, 1, -1 }, /* P12: docking, no OC */
+	{ 1, 1, -1 }, /* P13: camera (LCD), no OC */
+};
diff --git a/src/mainboard/lenovo/t420/gpio.c b/src/mainboard/lenovo/t420/variants/t420/gpio.c
similarity index 100%
rename from src/mainboard/lenovo/t420/gpio.c
rename to src/mainboard/lenovo/t420/variants/t420/gpio.c
diff --git a/src/mainboard/lenovo/t420/variants/t420/hda_verb.c b/src/mainboard/lenovo/t420/variants/t420/hda_verb.c
new file mode 100644
index 0000000..690c936
--- /dev/null
+++ b/src/mainboard/lenovo/t420/variants/t420/hda_verb.c
@@ -0,0 +1,45 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/* This file is part of the coreboot project. */
+
+/* Bits 31:28 - Codec Address */
+/* Bits 27:20 - NID */
+/* Bits 19:8 - Verb ID */
+/* Bits 7:0  - Payload */
+
+#include <device/azalia_device.h>
+
+const u32 cim_verb_data[] = {
+	0x14f1506e,	/* Codec VID / DID: Conexant CX20590 - schematic shows CX20672 */
+	0x17aa21ce,	/* Subsystem ID */
+	13,		/* Number of 4 dword sets */
+	AZALIA_SUBVENDOR(0, 0x17aa21d2),
+	AZALIA_PIN_CFG(0, 0x12, 0x90a60140),
+	AZALIA_PIN_CFG(0, 0x14, 0x90170110),
+	AZALIA_PIN_CFG(0, 0x15, 0x03211020),
+	AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x18, 0x03a11830),
+	AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x1d, 0x40138205),
+	AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
+
+	/* Misc entries */
+		0x00b707C0, /* Enable PortB as Output with HP amp */
+		0x00d70740, /* Enable PortD as Output */
+		0x0017a200, /* Disable ClkEn of PortSenseTst */
+		0x0017c621, /* Slave Port - Port A used as microphone input for
+		                            combo Jack
+		               Master Port - Port B used for Jack Presence Detect
+		               Enable Combo Jack Detection */
+		0x0017a208, /* Enable ClkEn of PortSenseTst */
+		0x00170500, /* Set power state to D0 */
+		0x00170500, /* Padding */
+		0x00170500, /* Padding */
+};
+
+const u32 pc_beep_verbs[] = {
+	0x02177a00, /* Digital PCBEEP Gain: 0h=-9db, 1h=-6db ... 4h=+3db, 5h=+6db */
+};
+
+AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/lenovo/t420/variants/t420/overridetree.cb b/src/mainboard/lenovo/t420/variants/t420/overridetree.cb
new file mode 100644
index 0000000..c0b503c
--- /dev/null
+++ b/src/mainboard/lenovo/t420/variants/t420/overridetree.cb
@@ -0,0 +1,13 @@
+chip northbridge/intel/sandybridge
+	device domain 0 on
+		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
+			device pci 1c.4 on
+				chip drivers/ricoh/rce822
+					register "sdwppol" = "1"
+					register "disable_mask" = "0x87"
+					device pci 00.0 on end
+				end
+			end # PCIe Port #5 (Ricoh SD & FW)
+		end
+	end
+end
diff --git a/src/mainboard/lenovo/t420s/board_info.txt b/src/mainboard/lenovo/t420/variants/t420s/board_info.txt
similarity index 100%
rename from src/mainboard/lenovo/t420s/board_info.txt
rename to src/mainboard/lenovo/t420/variants/t420s/board_info.txt
diff --git a/src/mainboard/lenovo/t420s/data.vbt b/src/mainboard/lenovo/t420/variants/t420s/data.vbt
similarity index 100%
rename from src/mainboard/lenovo/t420s/data.vbt
rename to src/mainboard/lenovo/t420/variants/t420s/data.vbt
Binary files differ
diff --git a/src/mainboard/lenovo/t420/variants/t420s/early_init.c b/src/mainboard/lenovo/t420/variants/t420s/early_init.c
new file mode 100644
index 0000000..3066da5
--- /dev/null
+++ b/src/mainboard/lenovo/t420/variants/t420s/early_init.c
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/* This file is part of the coreboot project. */
+
+#include <southbridge/intel/bd82x6x/pch.h>
+
+const struct southbridge_usb_port mainboard_usb_ports[] = {
+	{ 0, 1, -1 }, /* P0: empty */
+	{ 1, 1,  1 }, /* P1: system port 2 (To system port) (EHCI debug), OC 1 */
+	{ 1, 1, -1 }, /* P2: HALF MINICARD (WLAN) no oc */
+	{ 1, 0, -1 }, /* P3: WWAN, no OC */
+	{ 1, 1, -1 }, /* P4: smartcard, no OC */
+	{ 1, 1, -1 }, /* P5: ExpressCard, no OC */
+	{ 0, 0, -1 }, /* P6: empty */
+	{ 0, 0, -1 }, /* P7: empty */
+	{ 0, 1, -1 }, /* P8: empty (touch panel) */
+	{ 1, 0,  5 }, /* P9: system port 1 (To USBAO) (EHCI debug), OC 5 */
+	{ 1, 0, -1 }, /* P10: fingerprint reader, no OC */
+	{ 1, 1, -1 }, /* P11: bluetooth, no OC. */
+	{ 1, 1, -1 }, /* P12: docking, no OC */
+	{ 1, 1, -1 }, /* P13: camera (LCD), no OC */
+};
diff --git a/src/mainboard/lenovo/t420s/gpio.c b/src/mainboard/lenovo/t420/variants/t420s/gpio.c
similarity index 100%
rename from src/mainboard/lenovo/t420s/gpio.c
rename to src/mainboard/lenovo/t420/variants/t420s/gpio.c
diff --git a/src/mainboard/lenovo/t420s/hda_verb.c b/src/mainboard/lenovo/t420/variants/t420s/hda_verb.c
similarity index 100%
rename from src/mainboard/lenovo/t420s/hda_verb.c
rename to src/mainboard/lenovo/t420/variants/t420s/hda_verb.c
diff --git a/src/mainboard/lenovo/t420/variants/t420s/overridetree.cb b/src/mainboard/lenovo/t420/variants/t420s/overridetree.cb
new file mode 100644
index 0000000..e12d7ea
--- /dev/null
+++ b/src/mainboard/lenovo/t420/variants/t420s/overridetree.cb
@@ -0,0 +1,18 @@
+chip northbridge/intel/sandybridge
+	device domain 0 on
+		subsystemid 0x17aa 0x21d2 inherit
+
+		device pci 02.0 on
+			subsystemid 0x17aa 0x21d3
+		end # Integrated Graphics Controller
+
+		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
+			# Enable SATA ports 0 (HDD bay) & 1 (ODD bay) & 2 (mSATA) & 4 (dock)
+			register "sata_port_map" = "0x17"
+
+			device pci 19.0 on
+				subsystemid 0x17aa 0x21ce
+			end # Intel Gigabit Ethernet
+		end
+	end
+end
diff --git a/src/mainboard/lenovo/t420s/Kconfig b/src/mainboard/lenovo/t420s/Kconfig
deleted file mode 100644
index e2fd824..0000000
--- a/src/mainboard/lenovo/t420s/Kconfig
+++ /dev/null
@@ -1,83 +0,0 @@
-if BOARD_LENOVO_T420S
-
-config BOARD_SPECIFIC_OPTIONS
-	def_bool y
-	select SYSTEM_TYPE_LAPTOP
-	select NORTHBRIDGE_INTEL_SANDYBRIDGE
-	select USE_NATIVE_RAMINIT
-	select SOUTHBRIDGE_INTEL_BD82X6X
-	select EC_LENOVO_PMH7
-	select EC_LENOVO_H8
-	select H8_HAS_BAT_TRESHOLDS_IMPL
-	select NO_UART_ON_SUPERIO
-	select BOARD_ROMSIZE_KB_8192
-	select HAVE_ACPI_TABLES
-	select HAVE_OPTION_TABLE
-	select HAVE_CMOS_DEFAULT
-	select HAVE_ACPI_RESUME
-	select INTEL_INT15
-	select MAINBOARD_HAS_LPC_TPM
-	select MAINBOARD_HAS_TPM1
-	select MAINBOARD_HAS_LIBGFXINIT
-	select GFX_GMA_PANEL_1_ON_LVDS
-	select DRIVERS_LENOVO_HYBRID_GRAPHICS
-	select INTEL_GMA_HAVE_VBT
-	select MAINBOARD_USES_IFD_GBE_REGION
-
-	# Workaround for EC/KBC IRQ1.
-	select SERIRQ_CONTINUOUS_MODE
-
-config VBOOT
-	select VBOOT_VBNV_CMOS
-	select GBB_FLAG_DISABLE_LID_SHUTDOWN
-	select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC
-	select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC
-	select GBB_FLAG_DISABLE_FWMP
-	select HAS_RECOVERY_MRC_CACHE
-
-config VBOOT_SLOTS_RW_A
-	default y
-
-config VBOOT_VBNV_OFFSET
-	hex
-	default 0x2a
-
-config FMDFILE
-	string
-	default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/vboot-rwa.fmd" if VBOOT
-
-config MAINBOARD_DIR
-	string
-	default "lenovo/t420s"
-
-config MAINBOARD_PART_NUMBER
-	string
-	default "ThinkPad T420s"
-
-config MAX_CPUS
-	int
-	default 8
-
-config USBDEBUG_HCD_INDEX
-	int
-	default 2
-
-config DRAM_RESET_GATE_GPIO
-	int
-	default 10
-
-config VGA_BIOS_FILE
-	string
-	default "pci8086,0126.rom"
-
-config VGA_BIOS_ID
-	string
-	default "8086,0126"
-
-config PS2K_EISAID
-	default "PNP0303"
-
-config PS2M_EISAID
-	default "LEN0015"
-
-endif # BOARD_LENOVO_T420S
diff --git a/src/mainboard/lenovo/t420s/Kconfig.name b/src/mainboard/lenovo/t420s/Kconfig.name
deleted file mode 100644
index 648688b..0000000
--- a/src/mainboard/lenovo/t420s/Kconfig.name
+++ /dev/null
@@ -1,2 +0,0 @@
-config BOARD_LENOVO_T420S
-	bool "ThinkPad T420s"
diff --git a/src/mainboard/lenovo/t420s/Makefile.inc b/src/mainboard/lenovo/t420s/Makefile.inc
deleted file mode 100644
index 05befdd..0000000
--- a/src/mainboard/lenovo/t420s/Makefile.inc
+++ /dev/null
@@ -1,21 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-
-smm-y += smihandler.c
-bootblock-y += gpio.c
-romstage-y += gpio.c
-
-ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
-bootblock-y += early_init.c
-romstage-y += early_init.c
diff --git a/src/mainboard/lenovo/t420s/acpi/ec.asl b/src/mainboard/lenovo/t420s/acpi/ec.asl
deleted file mode 100644
index 2dda5ec..0000000
--- a/src/mainboard/lenovo/t420s/acpi/ec.asl
+++ /dev/null
@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
-
-#include <ec/lenovo/h8/acpi/ec.asl>
-
-Scope(_SB.PCI0.LPCB.EC)
-{
-}
-
-#include <ec/lenovo/h8/acpi/thinkpad_bat_thresholds_b0.asl>
diff --git a/src/mainboard/lenovo/t420s/acpi/platform.asl b/src/mainboard/lenovo/t420s/acpi/platform.asl
deleted file mode 100644
index dc46182..0000000
--- a/src/mainboard/lenovo/t420s/acpi/platform.asl
+++ /dev/null
@@ -1,28 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
-
-/* The _PTS method (Prepare To Sleep) is called before the OS is
- * entering a sleep state. The sleep state number is passed in Arg0
- */
-
-Method(_PTS,1)
-{
-	_SB.PCI0.LPCB.EC.MUTE(1)
-	_SB.PCI0.LPCB.EC.USBP(0)
-	_SB.PCI0.LPCB.EC.RADI(0)
-}
-
-/* The _WAK method is called on system wakeup */
-
-Method(_WAK,1)
-{
-	/* ME may not be up yet. */
-	Store (0, _TZ.MEB1)
-	Store (0, _TZ.MEB2)
-
-	/* Wake the HKEY to init BT/WWAN */
-	_SB.PCI0.LPCB.EC.HKEY.WAKE (Arg0)
-
-	/* Not implemented. */
-	Return(Package(){0,0})
-}
diff --git a/src/mainboard/lenovo/t420s/acpi/superio.asl b/src/mainboard/lenovo/t420s/acpi/superio.asl
deleted file mode 100644
index f2b35ba..0000000
--- a/src/mainboard/lenovo/t420s/acpi/superio.asl
+++ /dev/null
@@ -1 +0,0 @@
-#include <drivers/pc80/pc/ps2_controller.asl>
diff --git a/src/mainboard/lenovo/t420s/acpi_tables.c b/src/mainboard/lenovo/t420s/acpi_tables.c
deleted file mode 100644
index 65c6019..0000000
--- a/src/mainboard/lenovo/t420s/acpi_tables.c
+++ /dev/null
@@ -1,15 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
-
-#include <southbridge/intel/bd82x6x/nvs.h>
-
-void acpi_create_gnvs(global_nvs_t *gnvs)
-{
-	/* The lid is open by default */
-	gnvs->lids = 1;
-
-	/* Temperature at which OS will shutdown */
-	gnvs->tcrt = 100;
-	/* Temperature at which OS will throttle CPU */
-	gnvs->tpsv = 90;
-}
diff --git a/src/mainboard/lenovo/t420s/cmos.default b/src/mainboard/lenovo/t420s/cmos.default
deleted file mode 100644
index 467f965..0000000
--- a/src/mainboard/lenovo/t420s/cmos.default
+++ /dev/null
@@ -1,16 +0,0 @@
-boot_option=Fallback
-debug_level=Debug
-power_on_after_fail=Disable
-nmi=Enable
-volume=0x3
-first_battery=Primary
-bluetooth=Enable
-wwan=Enable
-wlan=Enable
-touchpad=Enable
-sata_mode=AHCI
-fn_ctrl_swap=Disable
-sticky_fn=Disable
-trackpoint=Enable
-hybrid_graphics_mode=Integrated Only
-usb_always_on=Disable
diff --git a/src/mainboard/lenovo/t420s/cmos.layout b/src/mainboard/lenovo/t420s/cmos.layout
deleted file mode 100644
index 26e6300..0000000
--- a/src/mainboard/lenovo/t420s/cmos.layout
+++ /dev/null
@@ -1,141 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-
-# -----------------------------------------------------------------
-entries
-
-# -----------------------------------------------------------------
-# Status Register A
-# -----------------------------------------------------------------
-# Status Register B
-# -----------------------------------------------------------------
-# Status Register C
-#96           4       r       0        status_c_rsvd
-#100          1       r       0        uf_flag
-#101          1       r       0        af_flag
-#102          1       r       0        pf_flag
-#103          1       r       0        irqf_flag
-# -----------------------------------------------------------------
-# Status Register D
-#104          7       r       0        status_d_rsvd
-#111          1       r       0        valid_cmos_ram
-# -----------------------------------------------------------------
-# Diagnostic Status Register
-#112          8       r       0        diag_rsvd1
-
-# -----------------------------------------------------------------
-0            120     r       0        reserved_memory
-#120          264     r       0        unused
-
-# -----------------------------------------------------------------
-# RTC_BOOT_BYTE (coreboot hardcoded)
-384          1       e       4        boot_option
-388          4       h       0        reboot_counter
-#390          2       r       0        unused?
-
-# -----------------------------------------------------------------
-# coreboot config options: console
-#392          3       r       0        unused
-395          4       e       6        debug_level
-#399          1       r       0        unused
-
-#400         8       r       0        reserved for century byte
-
-# coreboot config options: southbridge
-408          1       e       1        nmi
-409          2       e       7        power_on_after_fail
-
-# coreboot config options: EC
-411          1       e       8        first_battery
-412          1       e       1        bluetooth
-413          1       e       1        wwan
-414          1       e       1        touchpad
-415          1       e       1        wlan
-416          1       e       1        trackpoint
-417          1       e       1        fn_ctrl_swap
-418          1       e       1        sticky_fn
-419          1       e       1        power_management_beeps
-421          1       e       9        sata_mode
-422          2       e       13       usb_always_on
-
-# coreboot config options: cpu
-#424          8       r       0        unused
-
-# coreboot config options: northbridge
-432          3       e       11       gfx_uma_size
-435          2       e       12       hybrid_graphics_mode
-#437         3       r       0        unused
-
-440          8       h       0        volume
-
-# VBOOT
-448          128     r       0        vbnv
-
-# SandyBridge MRC Scrambler Seed values
-896          32      r       0        mrc_scrambler_seed
-928          32      r       0        mrc_scrambler_seed_s3
-960          16      r       0        mrc_scrambler_seed_chk
-
-# coreboot config options: check sums
-984          16      h       0        check_sum
-
-# -----------------------------------------------------------------
-
-enumerations
-
-#ID value   text
-1     0     Disable
-1     1     Enable
-2     0     Enable
-2     1     Disable
-4     0     Fallback
-4     1     Normal
-6     0     Emergency
-6     1     Alert
-6     2     Critical
-6     3     Error
-6     4     Warning
-6     5     Notice
-6     6     Info
-6     7     Debug
-6     8     Spew
-7     0     Disable
-7     1     Enable
-7     2     Keep
-8     0     Secondary
-8     1     Primary
-9     0     AHCI
-9     1     Compatible
-10    0     Both
-10    1     Keyboard only
-10    2     Thinklight only
-10    3     None
-11    0     32M
-11    1     64M
-11    2     96M
-11    3     128M
-11    4     160M
-11    5     192M
-11    6     224M
-12    0     Integrated Only
-12    1     Discrete Only
-12    2     Dual Graphics
-13    0     Disable
-13    1     AC and battery
-13    2     AC only
-
-# -----------------------------------------------------------------
-checksums
-
-checksum 392 447 984
diff --git a/src/mainboard/lenovo/t420s/devicetree.cb b/src/mainboard/lenovo/t420s/devicetree.cb
deleted file mode 100644
index b3399c3..0000000
--- a/src/mainboard/lenovo/t420s/devicetree.cb
+++ /dev/null
@@ -1,175 +0,0 @@
-chip northbridge/intel/sandybridge
-	# IGD Displays
-	register "gfx" = "GMA_STATIC_DISPLAYS(1)"
-
-	# Enable DisplayPort Hotplug with 6ms pulse
-	register "gpu_dp_d_hotplug" = "0x06"
-
-	# Enable Panel as LVDS and configure power delays
-	register "gpu_panel_port_select" = "0"			# LVDS
-	register "gpu_panel_power_cycle_delay" = "1"
-	register "gpu_panel_power_up_delay" = "300"		# T1+T2: 30ms
-	register "gpu_panel_power_down_delay" = "300"		# T5+T6: 30ms
-	register "gpu_panel_power_backlight_on_delay" = "2000"	# T3: 200ms
-	register "gpu_panel_power_backlight_off_delay" = "2000"	# T4: 200ms
-	register "gpu_cpu_backlight" = "0x1155"
-	register "gpu_pch_backlight" = "0x06100610"
-
-	device cpu_cluster 0 on
-		chip cpu/intel/model_206ax
-			# Magic APIC ID to locate this chip
-			device lapic 0x0 on end
-			device lapic 0xacac off end
-
-			register "c1_acpower" = "1"	# ACPI(C1) = MWAIT(C1)
-			register "c2_acpower" = "3"	# ACPI(C2) = MWAIT(C3)
-			register "c3_acpower" = "5"	# ACPI(C3) = MWAIT(C7)
-
-			register "c1_battery" = "1"	# ACPI(C1) = MWAIT(C1)
-			register "c2_battery" = "3"	# ACPI(C2) = MWAIT(C3)
-			register "c3_battery" = "5"	# ACPI(C3) = MWAIT(C7)
-		end
-	end
-
-	register "pci_mmio_size" = "2048"
-
-	device domain 0 on
-		subsystemid 0x17aa 0x21d2 inherit
-
-		device pci 00.0 on end # host bridge
-		device pci 01.0 on end # NVIDIA Corporation GF119M [NVS 4200M]
-		device pci 02.0 on
-			subsystemid 0x17aa 0x21d3
-		end # Integrated Graphics Controller
-
-		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
-			# GPI routing
-			#  0 No effect (default)
-			#  1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
-			#  2 SCI (if corresponding GPIO_EN bit is also set)
-			register "alt_gp_smi_en" = "0x0000"
-			register "gpi1_routing" = "2"
-			register "gpi13_routing" = "2"
-
-			# Enable SATA ports 0 (HDD bay) & 1 (ODD bay) & 2 (mSATA) & 4 (dock)
-			register "sata_port_map" = "0x17"
-			# Set max SATA speed to 6.0 Gb/s
-			register "sata_interface_speed_support" = "0x3"
-
-			register "gen1_dec" = "0x7c1601"
-			register "gen2_dec" = "0x0c15e1"
-			register "gen4_dec" = "0x0c06a1"
-
-			register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"
-
-			# Enable zero-based linear PCIe root port functions
-			register "pcie_port_coalesce" = "1"
-
-			register "c2_latency" = "101"  # c2 not supported
-
-			# device specific SPI configuration
-			register "spi_uvscc" = "0x2005"
-			register "spi_lvscc" = "0x2005"
-
-			device pci 16.0 off end # Management Engine Interface 1
-			device pci 16.1 off end # Management Engine Interface 2
-			device pci 16.2 off end # Management Engine IDE-R
-			device pci 16.3 off end # Management Engine KT
-			device pci 19.0 on
-				subsystemid 0x17aa 0x21ce
-			end # Intel Gigabit Ethernet
-			device pci 1a.0 on end # USB Enhanced Host Controller #2
-			device pci 1b.0 on end # High Definition Audio Controller
-			device pci 1c.0 off end # PCIe Port #1
-			device pci 1c.1 on end # PCIe Port #2 Integrated Wireless LAN
-			device pci 1c.2 off end # PCIe Port #3
-			device pci 1c.3 on
-				smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
-			end # PCIe Port #4 ExpressCard
-			device pci 1c.4 on end # PCIe Port #5 NEC Corporation uPD720200A USB 3.0 Host Controller
-			device pci 1c.5 off end # PCIe Port #6 Intel Gigabit Ethernet PHY (not PCIe)
-			device pci 1c.6 off end # PCIe Port #7
-			device pci 1c.7 off end # PCIe Port #8
-			device pci 1d.0 on end # USB Enhanced Host Controller #1
-			device pci 1e.0 off end # PCI bridge
-			device pci 1f.0 on
-				chip ec/lenovo/pmh7
-					device pnp ff.1 on end # dummy
-					register "backlight_enable" = "0x01"
-					register "dock_event_enable" = "0x01"
-				end
-
-				chip drivers/pc80/tpm
-					device pnp 0c31.0 on end
-				end
-
-				chip ec/lenovo/h8
-					device pnp ff.2 on # dummy
-						io 0x60 = 0x62
-						io 0x62 = 0x66
-						io 0x64 = 0x1600
-						io 0x66 = 0x1604
-					end
-
-					register "config0" = "0xa7"
-					register "config1" = "0x01"
-					register "config2" = "0xa0"
-					register "config3" = "0xe2"
-
-					register "has_keyboard_backlight" = "0"
-
-					register "beepmask0" = "0x02"
-					register "beepmask1" = "0x86"
-					register "has_power_management_beeps" = "1"
-					register "event2_enable" = "0xff"
-					register "event3_enable" = "0xff"
-					register "event4_enable" = "0xf0"
-					register "event5_enable" = "0x3c"
-					register "event6_enable" = "0x00"
-					register "event7_enable" = "0xa1"
-					register "event8_enable" = "0x7b"
-					register "event9_enable" = "0xff"
-					register "eventa_enable" = "0x00"
-					register "eventb_enable" = "0x00"
-					register "eventc_enable" = "0xff"
-					register "eventd_enable" = "0xff"
-					register "evente_enable" = "0x0d"
-
-					register "has_bdc_detection" = "1"
-					register "bdc_gpio_num" = "54"
-					register "bdc_gpio_lvl" = "0"
-				end
-				chip drivers/lenovo/hybrid_graphics
-					device pnp ff.f on end # dummy
-
-					register "detect_gpio" = "21"
-
-					register "has_panel_hybrid_gpio" = "1"
-					register "panel_hybrid_gpio" = "52"
-					register "panel_integrated_lvl" = "1"
-
-					register "has_backlight_gpio" = "0"
-					register "has_dgpu_power_gpio" = "0"
-
-					register "has_thinker1" = "1"
-				end
-			end # LPC Controller
-			device pci 1f.2 on end # 6 port SATA AHCI Controller
-			device pci 1f.3 on
-				# eeprom, 8 virtual devices, same chip
-				chip drivers/i2c/at24rf08c
-					device i2c 54 on end
-					device i2c 55 on end
-					device i2c 56 on end
-					device i2c 57 on end
-					device i2c 5c on end
-					device i2c 5d on end
-					device i2c 5e on end
-					device i2c 5f on end
-				end
-			end # SMBus Controller
-			device pci 1f.5 off end # SATA Controller 2
-			device pci 1f.6 on end # Thermal
-		end
-	end
-end
diff --git a/src/mainboard/lenovo/t420s/dsdt.asl b/src/mainboard/lenovo/t420s/dsdt.asl
deleted file mode 100644
index a03b252..0000000
--- a/src/mainboard/lenovo/t420s/dsdt.asl
+++ /dev/null
@@ -1,40 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
-
-#define THINKPAD_EC_GPE 17
-#define BRIGHTNESS_UP _SB.PCI0.GFX0.INCB
-#define BRIGHTNESS_DOWN _SB.PCI0.GFX0.DECB
-#define ACPI_VIDEO_DEVICE _SB.PCI0.GFX0
-#define EC_LENOVO_H8_ME_WORKAROUND 1
-
-#include <arch/acpi.h>
-DefinitionBlock(
-	"dsdt.aml",
-	"DSDT",
-	0x02,		// DSDT revision: ACPI v2.0 and up
-	OEM_ID,
-	ACPI_TABLE_CREATOR,
-	0x20110725	// OEM revision
-)
-{
-	#include <southbridge/intel/common/acpi/platform.asl>
-
-	#include "acpi/platform.asl"
-
-	// global NVS and variables
-	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-
-	#include <cpu/intel/common/acpi/cpu.asl>
-
-	Scope (_SB) {
-		Device (PCI0)
-		{
-			#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
-			#include <southbridge/intel/bd82x6x/acpi/pch.asl>
-
-			#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
-		}
-	}
-
-	#include <southbridge/intel/common/acpi/sleepstates.asl>
-}
diff --git a/src/mainboard/lenovo/t420s/early_init.c b/src/mainboard/lenovo/t420s/early_init.c
deleted file mode 100644
index 4f5f69d..0000000
--- a/src/mainboard/lenovo/t420s/early_init.c
+++ /dev/null
@@ -1,63 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
-
-#include <device/pci_ops.h>
-#include <northbridge/intel/sandybridge/raminit_native.h>
-#include <southbridge/intel/bd82x6x/pch.h>
-#include <drivers/lenovo/hybrid_graphics/hybrid_graphics.h>
-#include <northbridge/intel/sandybridge/sandybridge.h>
-#include <device/device.h>
-
-static void hybrid_graphics_init(void)
-{
-	bool peg, igd;
-	u32 reg32;
-
-	early_hybrid_graphics(&igd, &peg);
-
-	if (peg && igd)
-		return;
-
-	/* Hide disabled devices */
-	reg32 = pci_read_config32(PCI_DEV(0, 0, 0), DEVEN);
-	reg32 &= ~(DEVEN_PEG10 | DEVEN_IGD);
-
-	if (peg)
-		reg32 |= DEVEN_PEG10;
-
-	if (igd)
-		reg32 |= DEVEN_IGD;
-	else
-		/* Disable IGD VGA decode, no GTT or GFX stolen */
-		pci_write_config16(PCI_DEV(0, 0, 0), GGC, 2);
-
-	pci_write_config32(PCI_DEV(0, 0, 0), DEVEN, reg32);
-}
-
-const struct southbridge_usb_port mainboard_usb_ports[] = {
-	{ 0, 1, -1 }, /* P0: empty */
-	{ 1, 1,  1 }, /* P1: system port 2 (To system port) (EHCI debug), OC 1 */
-	{ 1, 1, -1 }, /* P2: HALF MINICARD (WLAN) no oc */
-	{ 1, 0, -1 }, /* P3: WWAN, no OC */
-	{ 1, 1, -1 }, /* P4: smartcard, no OC */
-	{ 1, 1, -1 }, /* P5: ExpressCard, no OC */
-	{ 0, 0, -1 }, /* P6: empty */
-	{ 0, 0, -1 }, /* P7: empty */
-	{ 0, 1, -1 }, /* P8: empty (touch panel) */
-	{ 1, 0,  5 }, /* P9: system port 1 (To USBAO) (EHCI debug), OC 5 */
-	{ 1, 0, -1 }, /* P10: fingerprint reader, no OC */
-	{ 1, 1, -1 }, /* P11: bluetooth, no OC. */
-	{ 1, 1, -1 }, /* P12: docking, no OC */
-	{ 1, 1, -1 }, /* P13: camera (LCD), no OC */
-};
-
-void mainboard_get_spd(spd_raw_data *spd, bool id_only)
-{
-	read_spd(&spd[0], 0x50, id_only);
-	read_spd(&spd[2], 0x51, id_only);
-}
-
-void mainboard_early_init(int s3resume)
-{
-	hybrid_graphics_init();
-}
diff --git a/src/mainboard/lenovo/t420s/gma-mainboard.ads b/src/mainboard/lenovo/t420s/gma-mainboard.ads
deleted file mode 100644
index fae3544..0000000
--- a/src/mainboard/lenovo/t420s/gma-mainboard.ads
+++ /dev/null
@@ -1,23 +0,0 @@
--- SPDX-License-Identifier: GPL-2.0-or-later
--- This file is part of the coreboot project.
-
-with HW.GFX.GMA;
-with HW.GFX.GMA.Display_Probing;
-
-use HW.GFX.GMA;
-use HW.GFX.GMA.Display_Probing;
-
-private package GMA.Mainboard is
-
-   ports : constant Port_List :=
-     (DP1,
-      DP2,
-      DP3,
-      HDMI1,
-      HDMI2,
-      HDMI3,
-      Analog,
-      LVDS,
-      others => Disabled);
-
-end GMA.Mainboard;
diff --git a/src/mainboard/lenovo/t420s/mainboard.c b/src/mainboard/lenovo/t420s/mainboard.c
deleted file mode 100644
index 0890151..0000000
--- a/src/mainboard/lenovo/t420s/mainboard.c
+++ /dev/null
@@ -1,17 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
-
-#include <device/device.h>
-#include <drivers/intel/gma/int15.h>
-#include <ec/lenovo/h8/h8.h>
-
-static void mainboard_enable(struct device *dev)
-{
-	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
-					GMA_INT15_PANEL_FIT_DEFAULT,
-					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
-}
-
-struct chip_operations mainboard_ops = {
-	.enable_dev = mainboard_enable,
-};
diff --git a/src/mainboard/lenovo/t420s/smihandler.c b/src/mainboard/lenovo/t420s/smihandler.c
deleted file mode 100644
index 4432995..0000000
--- a/src/mainboard/lenovo/t420s/smihandler.c
+++ /dev/null
@@ -1,69 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
-
-#include <arch/io.h>
-#include <console/console.h>
-#include <cpu/x86/smm.h>
-#include <ec/acpi/ec.h>
-#include <ec/lenovo/h8/h8.h>
-#include <southbridge/intel/bd82x6x/pch.h>
-#include <southbridge/intel/common/pmutil.h>
-
-#define GPE_EC_SCI	1
-#define GPE_EC_WAKE	13
-
-static void mainboard_smi_handle_ec_sci(void)
-{
-	u8 status = inb(EC_SC);
-	u8 event;
-
-	if (!(status & EC_SCI_EVT))
-		return;
-
-	event = ec_query();
-	printk(BIOS_DEBUG, "EC event %02x\n", event);
-}
-
-void mainboard_smi_gpi(u32 gpi_sts)
-{
-	if (gpi_sts & (1 << GPE_EC_SCI))
-		mainboard_smi_handle_ec_sci();
-}
-
-int mainboard_smi_apmc(u8 data)
-{
-	switch (data) {
-		case APM_CNT_ACPI_ENABLE:
-			/* use 0x1600/0x1604 to prevent races with userspace */
-			ec_set_ports(0x1604, 0x1600);
-			/* route EC_SCI to SCI */
-			gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SCI);
-			/* discard all events, and enable attention */
-			ec_write(0x80, 0x01);
-			break;
-		case APM_CNT_ACPI_DISABLE:
-			/* we have to use port 0x62/0x66, as 0x1600/0x1604 doesn't
-			   provide a EC query function */
-			ec_set_ports(0x66, 0x62);
-			/* route EC_SCI to SMI */
-			gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SMI);
-			/* discard all events, and enable attention */
-			ec_write(0x80, 0x01);
-			break;
-		default:
-			break;
-	}
-	return 0;
-}
-
-void mainboard_smi_sleep(u8 slp_typ)
-{
-	if (slp_typ == 3) {
-		u8 ec_wake = ec_read(0x32);
-		/* If EC wake events are enabled, enable wake on EC WAKE GPE. */
-		if (ec_wake & 0x14) {
-			/* Redirect EC WAKE GPE to SCI. */
-			gpi_route_interrupt(GPE_EC_WAKE, GPI_IS_SCI);
-		}
-	}
-}
diff --git a/src/mainboard/lenovo/t420s/vboot-ro-me_clean.fmd b/src/mainboard/lenovo/t420s/vboot-ro-me_clean.fmd
deleted file mode 100644
index d1cbff7..0000000
--- a/src/mainboard/lenovo/t420s/vboot-ro-me_clean.fmd
+++ /dev/null
@@ -1,22 +0,0 @@
-FLASH@0xff800000 0x800000 {
-	SI_ALL 0x20000 {
-		SI_DESC 0x1000
-		SI_GBE 0x2000
-		SI_ME
-	}
-	SI_BIOS 0x7e0000 {
-		UNIFIED_MRC_CACHE 0x20000 {
-			RECOVERY_MRC_CACHE 0x10000
-			RW_MRC_CACHE 0x10000
-		}
-
-		WP_RO {
-			FMAP 0x800
-			RO_FRID 0x40
-			RO_PADDING 0x7c0
-			RO_VPD(PRESERVE) 0x1000
-			GBB 0x1e000
-			COREBOOT(CBFS)
-		}
-	}
-}
diff --git a/src/mainboard/lenovo/t420s/vboot-ro.fmd b/src/mainboard/lenovo/t420s/vboot-ro.fmd
deleted file mode 100644
index 51df8a5..0000000
--- a/src/mainboard/lenovo/t420s/vboot-ro.fmd
+++ /dev/null
@@ -1,22 +0,0 @@
-FLASH@0xff800000 0x800000 {
-	SI_ALL 0x500000 {
-		SI_DESC 0x1000
-		SI_GBE 0x2000
-		SI_ME 0x4ed000
-	}
-	SI_BIOS 0x300000 {
-		UNIFIED_MRC_CACHE 0x20000 {
-			RECOVERY_MRC_CACHE 0x10000
-			RW_MRC_CACHE 0x10000
-		}
-
-		WP_RO {
-			FMAP 0x800
-			RO_FRID 0x40
-			RO_PADDING 0x7c0
-			RO_VPD(PRESERVE) 0x1000
-			GBB 0x1e000
-			COREBOOT(CBFS)
-		}
-	}
-}
diff --git a/src/mainboard/lenovo/t420s/vboot-rwa.fmd b/src/mainboard/lenovo/t420s/vboot-rwa.fmd
deleted file mode 100644
index 8a4cd3b..0000000
--- a/src/mainboard/lenovo/t420s/vboot-rwa.fmd
+++ /dev/null
@@ -1,29 +0,0 @@
-FLASH@0xff800000 0x800000 {
-	SI_ALL@0x0 0x500000 {
-		SI_DESC@0x0 0x1000
-		SI_GBE@0x1000 0x2000
-		SI_ME@0x3000 0x4ed000
-	}
-	SI_BIOS@0x500000 0x300000 {
-		RW_SECTION_A@0x00000 0x180000 {
-			VBLOCK_A@0x0 0x10000
-			FW_MAIN_A(CBFS)@0x10000 0x16ffc0
-			RW_FWID_A@0x17ffc0 0x40
-		}
-		UNIFIED_MRC_CACHE@0x180000 0x20000 {
-			RECOVERY_MRC_CACHE@0x0 0x10000
-			RW_MRC_CACHE@0x10000 0x10000
-		}
-		RW_VPD(PRESERVE)@0x1a0000 0x1000
-		SMMSTORE(PRESERVE)@0x1a1000 0x40000
-
-		WP_RO@0x1e1000 0x11f000 {
-			FMAP@0x0 0x800
-			RO_FRID@0x800 0x40
-			RO_PADDING@0x840 0x7c0
-			RO_VPD(PRESERVE)@0x1000 0x1000
-			GBB@0x2000 0x1e000
-			COREBOOT(CBFS)@0x20000 0xff000
-		}
-	}
-}
-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: If117c48cf8e6131b3d25112346d4ddd1ff366009
Gerrit-Change-Number: 40381
Gerrit-PatchSet: 1
Gerrit-Owner: Peter Lemenkov lemenkov@gmail.com
Gerrit-Reviewer: Alexander Couzens lynxis@fe80.eu
Gerrit-Reviewer: Martin Roth martinroth@google.com
Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com
Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org
Gerrit-MessageType: newchange



    