Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: fast spi multiple bios region windows ......................................................................
fast spi multiple bios region windows
Change-Id: I1b564aed9809cf14b40a3b8e907622266fc782e2 Signed-off-by: Furquan Shaikh furquan@google.com --- M src/soc/intel/common/block/fast_spi/Kconfig M src/soc/intel/common/block/fast_spi/Makefile.inc A src/soc/intel/common/block/fast_spi/mmap_boot.c M src/soc/intel/tigerlake/Kconfig 4 files changed, 76 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/47659/1
diff --git a/src/soc/intel/common/block/fast_spi/Kconfig b/src/soc/intel/common/block/fast_spi/Kconfig index 9369272..8724ca4 100644 --- a/src/soc/intel/common/block/fast_spi/Kconfig +++ b/src/soc/intel/common/block/fast_spi/Kconfig @@ -11,3 +11,13 @@ default y help Disable the write status SPI opcode in Intel Fast SPI block. + +config FAST_SPI_SUPPORTS_MULTIPLE_BIOS_WINDOWS + bool + depends on SOC_INTEL_COMMON_BLOCK_FAST_SPI + help + SoC has support for multiple BIOS region windows. + +config X86_TOP4G_BOOTMEDIA_MAP + bool + default n if FAST_SPI_SUPPORTS_MULTIPLE_BIOS_WINDOWS diff --git a/src/soc/intel/common/block/fast_spi/Makefile.inc b/src/soc/intel/common/block/fast_spi/Makefile.inc index e5b50aa..aa69b72 100644 --- a/src/soc/intel/common/block/fast_spi/Makefile.inc +++ b/src/soc/intel/common/block/fast_spi/Makefile.inc @@ -19,3 +19,10 @@ endif
CPPFLAGS_common += -I$(src)/soc/intel/common/block/fast_spi + +bootblock-$(CONFIG_FAST_SPI_SUPPORTS_MULTIPLE_BIOS_WINDOWS) += mmap_boot.c +romstage-$(CONFIG_FAST_SPI_SUPPORTS_MULTIPLE_BIOS_WINDOWS) += mmap_boot.c +verstage-$(CONFIG_FAST_SPI_SUPPORTS_MULTIPLE_BIOS_WINDOWS) += mmap_boot.c +ramstage-$(CONFIG_FAST_SPI_SUPPORTS_MULTIPLE_BIOS_WINDOWS) += mmap_boot.c +postcar-$(CONFIG_FAST_SPI_SUPPORTS_MULTIPLE_BIOS_WINDOWS) += mmap_boot.c +smm-$(CONFIG_FAST_SPI_SUPPORTS_MULTIPLE_BIOS_WINDOWS) += mmap_boot.c \ No newline at end of file diff --git a/src/soc/intel/common/block/fast_spi/mmap_boot.c b/src/soc/intel/common/block/fast_spi/mmap_boot.c new file mode 100644 index 0000000..4bc8531 --- /dev/null +++ b/src/soc/intel/common/block/fast_spi/mmap_boot.c @@ -0,0 +1,58 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <boot_device.h> +#include <commonlib/region.h> +#include <console/console.h> +#include <fmap.h> +#include <intelblocks/fast_spi.h> + +static size_t bios_size; + +static struct xlate_region_device real_dev; +static struct mem_region_device shadow_devs[2]; +static struct xlate_window real_dev_windows[2]; + +static void bios_mmap_init(void) +{ + size_t size, start; + uintptr_t std_window_base; + size_t std_window_size; + uintptr_t ext_window_base; + size_t ext_window_size; + size_t window_count = 0; + + if (bios_size != 0) + return; + + start = fast_spi_get_bios_region(&size); + + std_window_size = MIN(16 * MiB, size); + std_window_base = 4ULL * GiB - std_window_size; + + mem_region_device_ro_init(&shadow_devs[0], (void *)std_window_base, std_window_size); + real_dev_windows[0].access_dev = &shadow_devs[0].rdev; + real_dev_windows[0].sub_region.offset = start + size - std_window_size; + real_dev_windows[0].sub_region.size = std_window_size; + window_count++; + + ext_window_size = size - std_window_size; + ext_window_base = 0xF8000000; + + if (ext_window_size) { + mem_region_device_ro_init(&shadow_devs[1], (void *)ext_window_base, ext_window_size); + real_dev_windows[1].access_dev = &shadow_devs[1].rdev; + real_dev_windows[1].sub_region.offset = start; + real_dev_windows[1].sub_region.size = ext_window_size; + window_count++; + } + + xlate_region_device_ro_init(&real_dev, window_count, real_dev_windows, CONFIG_ROM_SIZE); + bios_size = size; +} + +const struct region_device *boot_device_ro(void) +{ + bios_mmap_init(); + + return &real_dev.rdev; +} diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index 507f871..5a338bd 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -15,6 +15,7 @@ select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_SUPPORTS_PM_TIMER_EMULATION select DRIVERS_USB_ACPI + select FAST_SPI_SUPPORTS_MULTIPLE_BIOS_WINDOWS select FSP_COMPRESS_FSP_S_LZ4 select FSP_M_XIP select FSP_STATUS_GLOBAL_RESET_REQUIRED_3
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: fast spi multiple bios region windows ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47659/1/src/soc/intel/common/block/... File src/soc/intel/common/block/fast_spi/mmap_boot.c:
https://review.coreboot.org/c/coreboot/+/47659/1/src/soc/intel/common/block/... PS1, Line 42: mem_region_device_ro_init(&shadow_devs[1], (void *)ext_window_base, ext_window_size); line over 96 characters
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
Patch Set 2:
This change is ready for review.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
Patch Set 2:
(16 comments)
https://review.coreboot.org/c/coreboot/+/47659/2/src/soc/intel/common/block/... File src/soc/intel/common/block/fast_spi/Kconfig:
https://review.coreboot.org/c/coreboot/+/47659/2/src/soc/intel/common/block/... PS2, Line 24: 1. Fixed decode window upto a maximum size of 16MiB under 'upto' may be misspelled - perhaps 'up to'?
https://review.coreboot.org/c/coreboot/+/47659/2/src/soc/intel/common/block/... PS2, Line 26: 2. Extended decode window upto a maximum size provided by 'upto' may be misspelled - perhaps 'up to'?
https://review.coreboot.org/c/coreboot/+/47659/2/src/soc/intel/common/block/... File src/soc/intel/common/block/fast_spi/mmap_boot.c:
https://review.coreboot.org/c/coreboot/+/47659/2/src/soc/intel/common/block/... PS2, Line 34: * ^ +------------+--------------------------^--------------------------------+ 0xffffffff line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/2/src/soc/intel/common/block/... PS2, Line 44: * | | | fixed_win_flash_base+----v--------------------------------+ fixed_win_host_base line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/2/src/soc/intel/common/block/... PS2, Line 53: * | | | +-----^------------------------------------------------------------^ line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/2/src/soc/intel/common/block/... PS2, Line 54: * 0 +------------+ | | | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/2/src/soc/intel/common/block/... PS2, Line 55: * | + | EXT_BIOS | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/2/src/soc/intel/common/block/... PS2, Line 56: * SPI flash | ext_win_size | DECODE | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/2/src/soc/intel/common/block/... PS2, Line 57: * address | + | WINDOW | + line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/2/src/soc/intel/common/block/... PS2, Line 58: * space | | | | CONFIG_EXT_BIOS_WIN_SIZE line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/2/src/soc/intel/common/block/... PS2, Line 59: * +--------------v-------------------------------+ ext_win_host_base + line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/2/src/soc/intel/common/block/... PS2, Line 60: * | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/2/src/soc/intel/common/block/... PS2, Line 61: * | Unused | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/2/src/soc/intel/common/block/... PS2, Line 62: * | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/2/src/soc/intel/common/block/... PS2, Line 63: * +--------------+ CONFIG_EXT_BIOS_WIN_BASE+--v line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/2/src/soc/intel/common/block/... PS2, Line 104: * Remaining portion of the BIOS region upto a maximum of CONFIG_EXT_BIOS_WIN_SIZE is 'upto' may be misspelled - perhaps 'up to'?
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Duncan Laurie, Tim Wawrzynczak, Srinidhi N Kaushik, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47659
to look at the new patch set (#3).
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
soc/intel/common/fast_spi: Add custom boot media device
This change enables support for a custom boot media device in fast SPI controller driver if the platform supports additional decode window for mapping BIOS regions greater than 16MiB. Following new Kconfigs are added: 1. FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW: SoC can select this to indicate support for extended BIOS window. 2. EXT_BIOS_WIN_BASE: If FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW is selected, this provides the base address of the host space that is reserved for mapping the extended window. 3. EXT_BIOS_WIN_SIZE: If FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW is selected, this provides the size of the host space reserved for mapping extended window.
If platform indicates support for extended BIOS decode window, cbfstool add command is provided additional parameters for the decode window using --ext-win-base and --ext-win-size.
It is the responsibility of the mainboard fmap author to ensure that the sections in the BIOS region do not cross 16MiB boundary as the host space windows are not contiguous. This change adds a build time check to ensure no sections in FMAP cross the 16MiB boundary.
Even though the platform supports extended window, it depends upon the size of BIOS region (which in turn depends on SPI flash size) whether and how much of the additional window is utilized at runtime. This change also provides helper functions for rest of the coreboot components to query how much of the extended window is actually utilized.
BUG=b:171534504
Change-Id: I1b564aed9809cf14b40a3b8e907622266fc782e2 Signed-off-by: Furquan Shaikh furquan@google.com --- M src/soc/intel/common/block/fast_spi/Kconfig M src/soc/intel/common/block/fast_spi/Makefile.inc A src/soc/intel/common/block/fast_spi/mmap_boot.c M src/soc/intel/common/block/include/intelblocks/fast_spi.h 4 files changed, 233 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/47659/3
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
Patch Set 3:
(13 comments)
https://review.coreboot.org/c/coreboot/+/47659/3/src/soc/intel/common/block/... File src/soc/intel/common/block/fast_spi/mmap_boot.c:
https://review.coreboot.org/c/coreboot/+/47659/3/src/soc/intel/common/block/... PS3, Line 34: * ^ +------------+--------------------------^--------------------------------+ 0xffffffff line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/3/src/soc/intel/common/block/... PS3, Line 44: * | | | fixed_win_flash_base+----v--------------------------------+ fixed_win_host_base line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/3/src/soc/intel/common/block/... PS3, Line 53: * | | | +-----^------------------------------------------------------------^ line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/3/src/soc/intel/common/block/... PS3, Line 54: * 0 +------------+ | | | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/3/src/soc/intel/common/block/... PS3, Line 55: * | + | EXT_BIOS | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/3/src/soc/intel/common/block/... PS3, Line 56: * SPI flash | ext_win_size | DECODE | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/3/src/soc/intel/common/block/... PS3, Line 57: * address | + | WINDOW | + line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/3/src/soc/intel/common/block/... PS3, Line 58: * space | | | | CONFIG_EXT_BIOS_WIN_SIZE line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/3/src/soc/intel/common/block/... PS3, Line 59: * +--------------v-------------------------------+ ext_win_host_base + line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/3/src/soc/intel/common/block/... PS3, Line 60: * | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/3/src/soc/intel/common/block/... PS3, Line 61: * | Unused | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/3/src/soc/intel/common/block/... PS3, Line 62: * | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/3/src/soc/intel/common/block/... PS3, Line 63: * +--------------+ CONFIG_EXT_BIOS_WIN_BASE+--v line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
Patch Set 4:
(13 comments)
https://review.coreboot.org/c/coreboot/+/47659/4/src/soc/intel/common/block/... File src/soc/intel/common/block/fast_spi/mmap_boot.c:
https://review.coreboot.org/c/coreboot/+/47659/4/src/soc/intel/common/block/... PS4, Line 34: * ^ +------------+--------------------------^--------------------------------+ 0xffffffff line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/4/src/soc/intel/common/block/... PS4, Line 44: * | | | fixed_win_flash_base+----v--------------------------------+ fixed_win_host_base line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/4/src/soc/intel/common/block/... PS4, Line 53: * | | | +-----^------------------------------------------------------------^ line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/4/src/soc/intel/common/block/... PS4, Line 54: * 0 +------------+ | | | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/4/src/soc/intel/common/block/... PS4, Line 55: * | + | EXT_BIOS | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/4/src/soc/intel/common/block/... PS4, Line 56: * SPI flash | ext_win_size | DECODE | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/4/src/soc/intel/common/block/... PS4, Line 57: * address | + | WINDOW | + line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/4/src/soc/intel/common/block/... PS4, Line 58: * space | | | | CONFIG_EXT_BIOS_WIN_SIZE line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/4/src/soc/intel/common/block/... PS4, Line 59: * +--------------v-------------------------------+ ext_win_host_base + line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/4/src/soc/intel/common/block/... PS4, Line 60: * | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/4/src/soc/intel/common/block/... PS4, Line 61: * | Unused | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/4/src/soc/intel/common/block/... PS4, Line 62: * | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/4/src/soc/intel/common/block/... PS4, Line 63: * +--------------+ CONFIG_EXT_BIOS_WIN_BASE+--v line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
Patch Set 5:
(13 comments)
https://review.coreboot.org/c/coreboot/+/47659/5/src/soc/intel/common/block/... File src/soc/intel/common/block/fast_spi/mmap_boot.c:
https://review.coreboot.org/c/coreboot/+/47659/5/src/soc/intel/common/block/... PS5, Line 34: * ^ +------------+--------------------------^--------------------------------+ 0xffffffff line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/5/src/soc/intel/common/block/... PS5, Line 44: * | | | fixed_win_flash_base+----v--------------------------------+ fixed_win_host_base line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/5/src/soc/intel/common/block/... PS5, Line 53: * | | | +-----^------------------------------------------------------------^ line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/5/src/soc/intel/common/block/... PS5, Line 54: * 0 +------------+ | | | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/5/src/soc/intel/common/block/... PS5, Line 55: * | + | EXT_BIOS | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/5/src/soc/intel/common/block/... PS5, Line 56: * SPI flash | ext_win_size | DECODE | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/5/src/soc/intel/common/block/... PS5, Line 57: * address | + | WINDOW | + line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/5/src/soc/intel/common/block/... PS5, Line 58: * space | | | | CONFIG_EXT_BIOS_WIN_SIZE line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/5/src/soc/intel/common/block/... PS5, Line 59: * +--------------v-------------------------------+ ext_win_host_base + line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/5/src/soc/intel/common/block/... PS5, Line 60: * | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/5/src/soc/intel/common/block/... PS5, Line 61: * | Unused | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/5/src/soc/intel/common/block/... PS5, Line 62: * | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/5/src/soc/intel/common/block/... PS5, Line 63: * +--------------+ CONFIG_EXT_BIOS_WIN_BASE+--v line over 96 characters
Srinidhi N Kaushik has uploaded a new patch set (#7) to the change originally created by Furquan Shaikh. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
soc/intel/common/fast_spi: Add custom boot media device
This change enables support for a custom boot media device in fast SPI controller driver if the platform supports additional decode window for mapping BIOS regions greater than 16MiB. Following new Kconfigs are added: 1. FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW: SoC can select this to indicate support for extended BIOS window. 2. EXT_BIOS_WIN_BASE: If FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW is selected, this provides the base address of the host space that is reserved for mapping the extended window. 3. EXT_BIOS_WIN_SIZE: If FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW is selected, this provides the size of the host space reserved for mapping extended window.
If platform indicates support for extended BIOS decode window, cbfstool add command is provided additional parameters for the decode window using --ext-win-base and --ext-win-size.
It is the responsibility of the mainboard fmap author to ensure that the sections in the BIOS region do not cross 16MiB boundary as the host space windows are not contiguous. This change adds a build time check to ensure no sections in FMAP cross the 16MiB boundary.
Even though the platform supports extended window, it depends upon the size of BIOS region (which in turn depends on SPI flash size) whether and how much of the additional window is utilized at runtime. This change also provides helper functions for rest of the coreboot components to query how much of the extended window is actually utilized.
BUG=b:171534504
Change-Id: I1b564aed9809cf14b40a3b8e907622266fc782e2 Signed-off-by: Furquan Shaikh furquan@google.com --- M src/soc/intel/common/block/fast_spi/Kconfig M src/soc/intel/common/block/fast_spi/Makefile.inc A src/soc/intel/common/block/fast_spi/mmap_boot.c M src/soc/intel/common/block/include/intelblocks/fast_spi.h 4 files changed, 233 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/47659/7
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
Patch Set 7:
(13 comments)
https://review.coreboot.org/c/coreboot/+/47659/7/src/soc/intel/common/block/... File src/soc/intel/common/block/fast_spi/mmap_boot.c:
https://review.coreboot.org/c/coreboot/+/47659/7/src/soc/intel/common/block/... PS7, Line 34: * ^ +------------+--------------------------^--------------------------------+ 0xffffffff line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/7/src/soc/intel/common/block/... PS7, Line 44: * | | | fixed_win_flash_base+----v--------------------------------+ fixed_win_host_base line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/7/src/soc/intel/common/block/... PS7, Line 53: * | | | +-----^------------------------------------------------------------^ line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/7/src/soc/intel/common/block/... PS7, Line 54: * 0 +------------+ | | | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/7/src/soc/intel/common/block/... PS7, Line 55: * | + | EXT_BIOS | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/7/src/soc/intel/common/block/... PS7, Line 56: * SPI flash | ext_win_size | DECODE | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/7/src/soc/intel/common/block/... PS7, Line 57: * address | + | WINDOW | + line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/7/src/soc/intel/common/block/... PS7, Line 58: * space | | | | CONFIG_EXT_BIOS_WIN_SIZE line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/7/src/soc/intel/common/block/... PS7, Line 59: * +--------------v-------------------------------+ ext_win_host_base + line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/7/src/soc/intel/common/block/... PS7, Line 60: * | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/7/src/soc/intel/common/block/... PS7, Line 61: * | Unused | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/7/src/soc/intel/common/block/... PS7, Line 62: * | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/7/src/soc/intel/common/block/... PS7, Line 63: * +--------------+ CONFIG_EXT_BIOS_WIN_BASE+--v line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
Patch Set 8:
(13 comments)
https://review.coreboot.org/c/coreboot/+/47659/8/src/soc/intel/common/block/... File src/soc/intel/common/block/fast_spi/mmap_boot.c:
https://review.coreboot.org/c/coreboot/+/47659/8/src/soc/intel/common/block/... PS8, Line 34: * ^ +------------+--------------------------^--------------------------------+ 0xffffffff line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/8/src/soc/intel/common/block/... PS8, Line 44: * | | | fixed_win_flash_base+----v--------------------------------+ fixed_win_host_base line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/8/src/soc/intel/common/block/... PS8, Line 53: * | | | +-----^------------------------------------------------------------^ line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/8/src/soc/intel/common/block/... PS8, Line 54: * 0 +------------+ | | | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/8/src/soc/intel/common/block/... PS8, Line 55: * | + | EXT_BIOS | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/8/src/soc/intel/common/block/... PS8, Line 56: * SPI flash | ext_win_size | DECODE | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/8/src/soc/intel/common/block/... PS8, Line 57: * address | + | WINDOW | + line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/8/src/soc/intel/common/block/... PS8, Line 58: * space | | | | CONFIG_EXT_BIOS_WIN_SIZE line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/8/src/soc/intel/common/block/... PS8, Line 59: * +--------------v-------------------------------+ ext_win_host_base + line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/8/src/soc/intel/common/block/... PS8, Line 60: * | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/8/src/soc/intel/common/block/... PS8, Line 61: * | Unused | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/8/src/soc/intel/common/block/... PS8, Line 62: * | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/8/src/soc/intel/common/block/... PS8, Line 63: * +--------------+ CONFIG_EXT_BIOS_WIN_BASE+--v line over 96 characters
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Duncan Laurie, Tim Wawrzynczak, Srinidhi N Kaushik, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47659
to look at the new patch set (#9).
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
soc/intel/common/fast_spi: Add custom boot media device
This change enables support for a custom boot media device in fast SPI controller driver if the platform supports additional decode window for mapping BIOS regions greater than 16MiB. Following new Kconfigs are added: 1. FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW: SoC can select this to indicate support for extended BIOS window. 2. EXT_BIOS_WIN_BASE: If FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW is selected, this provides the base address of the host space that is reserved for mapping the extended window. 3. EXT_BIOS_WIN_SIZE: If FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW is selected, this provides the size of the host space reserved for mapping extended window.
If platform indicates support for extended BIOS decode window, cbfstool add command is provided additional parameters for the decode window using --ext-win-base and --ext-win-size.
It is the responsibility of the mainboard fmap author to ensure that the sections in the BIOS region do not cross 16MiB boundary as the host space windows are not contiguous. This change adds a build time check to ensure no sections in FMAP cross the 16MiB boundary.
Even though the platform supports extended window, it depends upon the size of BIOS region (which in turn depends on SPI flash size) whether and how much of the additional window is utilized at runtime. This change also provides helper functions for rest of the coreboot components to query how much of the extended window is actually utilized.
BUG=b:171534504
Change-Id: I1b564aed9809cf14b40a3b8e907622266fc782e2 Signed-off-by: Furquan Shaikh furquan@google.com --- M src/soc/intel/common/block/fast_spi/Kconfig M src/soc/intel/common/block/fast_spi/Makefile.inc A src/soc/intel/common/block/fast_spi/mmap_boot.c M src/soc/intel/common/block/include/intelblocks/fast_spi.h 4 files changed, 236 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/47659/9
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
Patch Set 9:
(13 comments)
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... File src/soc/intel/common/block/fast_spi/mmap_boot.c:
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 34: * ^ +------------+--------------------------^--------------------------------+ 0xffffffff line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 44: * | | | fixed_win_flash_base+----v--------------------------------+ fixed_win_host_base line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 53: * | | | +-----^------------------------------------------------------------^ line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 54: * 0 +------------+ | | | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 55: * | + | EXT_BIOS | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 56: * SPI flash | ext_win_size | DECODE | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 57: * address | + | WINDOW | + line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 58: * space | | | | CONFIG_EXT_BIOS_WIN_SIZE line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 59: * +--------------v-------------------------------+ ext_win_host_base + line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 60: * | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 61: * | Unused | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 62: * | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 63: * +--------------+ CONFIG_EXT_BIOS_WIN_BASE+--v line over 96 characters
Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
Patch Set 9:
(3 comments)
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... File src/soc/intel/common/block/fast_spi/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 25: mmap_boot mmap_boot.c sounds very generic but ends up being tied to this new config option, you might consider naming it something more specific.
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 35: check-fmap-16mib-crossing this seems like it could be done easier in fmaptool? but it would probably need to be behind an argument which is harder to isolate to this makefile unless you add something like FMAPTOOL_ADD_CMD_OPTIONS
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... File src/soc/intel/common/block/fast_spi/mmap_boot.c:
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 103: CONFIG_EXT_BIOS_WIN_BASE could these be checked at compile time?
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
Patch Set 9:
(3 comments)
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... File src/soc/intel/common/block/fast_spi/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 25: mmap_boot
mmap_boot. […]
I had named it mmap_boot.c because the file that provides the boot media device definition is named as mmap_boot.c in: src/arch/x86/mmap_boot.c and src/soc/intel/apollolake/mmap_boot.c
Would ext_bios_mmap_boot.c be a better name?
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 35: check-fmap-16mib-crossing
this seems like it could be done easier in fmaptool? but it would probably need to be behind an arg […]
Yeah, I went back and forth on that a bit. Adding an option to fmaptool works, but it seems to be required for a very specific use case. Hence, I ended up keeping it here.
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... File src/soc/intel/common/block/fast_spi/mmap_boot.c:
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 103: CONFIG_EXT_BIOS_WIN_BASE
could these be checked at compile time?
Yes, _Static_assert ensures that this gets checked at compile time.
Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
Patch Set 9:
(2 comments)
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... File src/soc/intel/common/block/fast_spi/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 25: mmap_boot
I had named it mmap_boot. […]
It is still mmap_boot so it is technically correct.. You could just put a comment at the top. (it has the diagram but that still doesn't make it clear it only applies to the ext case)
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... File src/soc/intel/common/block/fast_spi/mmap_boot.c:
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 103: CONFIG_EXT_BIOS_WIN_BASE
Yes, _Static_assert ensures that this gets checked at compile time.
oh right, of course..
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
Patch Set 9:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... File src/soc/intel/common/block/fast_spi/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 25: mmap_boot
It is still mmap_boot so it is technically correct.. You could just put a comment at the top. […]
That's a good idea. I will add a comment here and in mmap_boot.c to make it clear what the purpose of the file is.
Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
Patch Set 9:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... File src/soc/intel/common/block/fast_spi/mmap_boot.c:
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 115: ext_win_size one thing that might be nice as I was trying these patches is to see some console output indicating the windows that end up getting used. I'm not sure here is the right place since this function ends up getting called for every stage and we don't necessarily need the same output 4 times in one boot...
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
Patch Set 9:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... File src/soc/intel/common/block/fast_spi/mmap_boot.c:
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 115: ext_win_size
one thing that might be nice as I was trying these patches is to see some console output indicating […]
That is a good point. I had initially added prints only for bootblock. But, the bootblock setup happens before console is initialized. So, that isn't very helpful. The other option I thought about was to do it as part of spi_flash_get_mmap_windows: https://review.coreboot.org/c/coreboot/+/48185/2/src/soc/intel/common/block/..., but not sure if that is just too late. Any other recommendations?
Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
Patch Set 9:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... File src/soc/intel/common/block/fast_spi/mmap_boot.c:
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 115: ext_win_size
That is a good point. I had initially added prints only for bootblock. […]
I had the same thought about putting it in a BS_INIT entry is that maybe ramstage is too late if it was going to impact the boot. Could just do it in here and let it happen 4 times in the output, wouldn't be the only duplicated output...
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
Patch Set 9:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... File src/soc/intel/common/block/fast_spi/mmap_boot.c:
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 115: ext_win_size
I had the same thought about putting it in a BS_INIT entry is that maybe ramstage is too late if it […]
Sounds good. I will add a print here.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
Patch Set 9:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... File src/soc/intel/common/block/fast_spi/mmap_boot.c:
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 115: ext_win_size
Sounds good. I will add a print here.
BTW, just waiting for review comments on the previous CLs so that I can push all changes in one go. Trying to avoid uploading on top of Srinidhi's changes in the train.
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Duncan Laurie, Tim Wawrzynczak, Srinidhi N Kaushik, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47659
to look at the new patch set (#10).
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
soc/intel/common/fast_spi: Add custom boot media device
This change enables support for a custom boot media device in fast SPI controller driver if the platform supports additional decode window for mapping BIOS regions greater than 16MiB. Following new Kconfigs are added: 1. FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW: SoC can select this to indicate support for extended BIOS window. 2. EXT_BIOS_WIN_BASE: If FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW is selected, this provides the base address of the host space that is reserved for mapping the extended window. 3. EXT_BIOS_WIN_SIZE: If FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW is selected, this provides the size of the host space reserved for mapping extended window.
If platform indicates support for extended BIOS decode window, cbfstool add command is provided additional parameters for the decode window using --ext-win-base and --ext-win-size.
It is the responsibility of the mainboard fmap author to ensure that the sections in the BIOS region do not cross 16MiB boundary as the host space windows are not contiguous. This change adds a build time check to ensure no sections in FMAP cross the 16MiB boundary.
Even though the platform supports extended window, it depends upon the size of BIOS region (which in turn depends on SPI flash size) whether and how much of the additional window is utilized at runtime. This change also provides helper functions for rest of the coreboot components to query how much of the extended window is actually utilized.
BUG=b:171534504
Change-Id: I1b564aed9809cf14b40a3b8e907622266fc782e2 Signed-off-by: Furquan Shaikh furquan@google.com --- M src/soc/intel/common/block/fast_spi/Kconfig M src/soc/intel/common/block/fast_spi/Makefile.inc A src/soc/intel/common/block/fast_spi/mmap_boot.c M src/soc/intel/common/block/include/intelblocks/fast_spi.h 4 files changed, 248 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/47659/10
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
Patch Set 10:
(2 comments)
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... File src/soc/intel/common/block/fast_spi/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 25: mmap_boot
That's a good idea. I will add a comment here and in mmap_boot. […]
Done.
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... File src/soc/intel/common/block/fast_spi/mmap_boot.c:
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 115: ext_win_size
BTW, just waiting for review comments on the previous CLs so that I can push all changes in one go. […]
Done
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
Patch Set 10:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... File src/soc/intel/common/block/fast_spi/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/47659/9/src/soc/intel/common/block/... PS9, Line 35: check-fmap-16mib-crossing
Yeah, I went back and forth on that a bit. […]
I have retained this as is for now to avoid adding platform specific checks(regions crossing 16M) in fmaptool. If you feel strongly about moving to fmaptool, I can look into that.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
Patch Set 11:
(13 comments)
https://review.coreboot.org/c/coreboot/+/47659/11/src/soc/intel/common/block... File src/soc/intel/common/block/fast_spi/mmap_boot.c:
https://review.coreboot.org/c/coreboot/+/47659/11/src/soc/intel/common/block... PS11, Line 43: * ^ +------------+--------------------------^--------------------------------+ 0xffffffff line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/11/src/soc/intel/common/block... PS11, Line 53: * | | | fixed_win_flash_base+----v--------------------------------+ fixed_win_host_base line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/11/src/soc/intel/common/block... PS11, Line 62: * | | | +-----^------------------------------------------------------------^ line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/11/src/soc/intel/common/block... PS11, Line 63: * 0 +------------+ | | | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/11/src/soc/intel/common/block... PS11, Line 64: * | + | EXT_BIOS | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/11/src/soc/intel/common/block... PS11, Line 65: * SPI flash | ext_win_size | DECODE | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/11/src/soc/intel/common/block... PS11, Line 66: * address | + | WINDOW | + line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/11/src/soc/intel/common/block... PS11, Line 67: * space | | | | CONFIG_EXT_BIOS_WIN_SIZE line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/11/src/soc/intel/common/block... PS11, Line 68: * +--------------v-------------------------------+ ext_win_host_base + line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/11/src/soc/intel/common/block... PS11, Line 69: * | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/11/src/soc/intel/common/block... PS11, Line 70: * | Unused | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/11/src/soc/intel/common/block... PS11, Line 71: * | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/11/src/soc/intel/common/block... PS11, Line 72: * +--------------+ CONFIG_EXT_BIOS_WIN_BASE+--v line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
Patch Set 13:
(13 comments)
https://review.coreboot.org/c/coreboot/+/47659/13/src/soc/intel/common/block... File src/soc/intel/common/block/fast_spi/mmap_boot.c:
https://review.coreboot.org/c/coreboot/+/47659/13/src/soc/intel/common/block... PS13, Line 43: * ^ +------------+--------------------------^--------------------------------+ 0xffffffff line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/13/src/soc/intel/common/block... PS13, Line 53: * | | | fixed_win_flash_base+----v--------------------------------+ fixed_win_host_base line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/13/src/soc/intel/common/block... PS13, Line 62: * | | | +-----^------------------------------------------------------------^ line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/13/src/soc/intel/common/block... PS13, Line 63: * 0 +------------+ | | | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/13/src/soc/intel/common/block... PS13, Line 64: * | + | EXT_BIOS | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/13/src/soc/intel/common/block... PS13, Line 65: * SPI flash | ext_win_size | DECODE | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/13/src/soc/intel/common/block... PS13, Line 66: * address | + | WINDOW | + line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/13/src/soc/intel/common/block... PS13, Line 67: * space | | | | CONFIG_EXT_BIOS_WIN_SIZE line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/13/src/soc/intel/common/block... PS13, Line 68: * +--------------v-------------------------------+ ext_win_host_base + line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/13/src/soc/intel/common/block... PS13, Line 69: * | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/13/src/soc/intel/common/block... PS13, Line 70: * | Unused | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/13/src/soc/intel/common/block... PS13, Line 71: * | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/13/src/soc/intel/common/block... PS13, Line 72: * +--------------+ CONFIG_EXT_BIOS_WIN_BASE+--v line over 96 characters
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Duncan Laurie, Tim Wawrzynczak, Srinidhi N Kaushik, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47659
to look at the new patch set (#15).
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
soc/intel/common/fast_spi: Add custom boot media device
This change enables support for a custom boot media device in fast SPI controller driver if the platform supports additional decode window for mapping BIOS regions greater than 16MiB. Following new Kconfigs are added: 1. FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW: SoC can select this to indicate support for extended BIOS window. 2. EXT_BIOS_WIN_BASE: If FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW is selected, this provides the base address of the host space that is reserved for mapping the extended window. 3. EXT_BIOS_WIN_SIZE: If FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW is selected, this provides the size of the host space reserved for mapping extended window.
If platform indicates support for extended BIOS decode window, cbfstool add command is provided additional parameters for the decode window using --ext-win-base and --ext-win-size.
It is the responsibility of the mainboard fmap author to ensure that the sections in the BIOS region do not cross 16MiB boundary as the host space windows are not contiguous. This change adds a build time check to ensure no sections in FMAP cross the 16MiB boundary.
Even though the platform supports extended window, it depends upon the size of BIOS region (which in turn depends on SPI flash size) whether and how much of the additional window is utilized at runtime. This change also provides helper functions for rest of the coreboot components to query how much of the extended window is actually utilized.
BUG=b:171534504
Change-Id: I1b564aed9809cf14b40a3b8e907622266fc782e2 Signed-off-by: Furquan Shaikh furquan@google.com --- M src/soc/intel/common/block/fast_spi/Kconfig M src/soc/intel/common/block/fast_spi/Makefile.inc A src/soc/intel/common/block/fast_spi/mmap_boot.c M src/soc/intel/common/block/include/intelblocks/fast_spi.h 4 files changed, 246 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/47659/15
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
Patch Set 15:
(13 comments)
https://review.coreboot.org/c/coreboot/+/47659/15/src/soc/intel/common/block... File src/soc/intel/common/block/fast_spi/mmap_boot.c:
https://review.coreboot.org/c/coreboot/+/47659/15/src/soc/intel/common/block... PS15, Line 43: * ^ +------------+--------------------------^--------------------------------+ 0xffffffff line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/15/src/soc/intel/common/block... PS15, Line 53: * | | | fixed_win_flash_base+----v--------------------------------+ fixed_win_host_base line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/15/src/soc/intel/common/block... PS15, Line 62: * | | | +-----^------------------------------------------------------------^ line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/15/src/soc/intel/common/block... PS15, Line 63: * 0 +------------+ | | | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/15/src/soc/intel/common/block... PS15, Line 64: * | + | EXT_BIOS | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/15/src/soc/intel/common/block... PS15, Line 65: * SPI flash | ext_win_size | DECODE | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/15/src/soc/intel/common/block... PS15, Line 66: * address | + | WINDOW | + line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/15/src/soc/intel/common/block... PS15, Line 67: * space | | | | CONFIG_EXT_BIOS_WIN_SIZE line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/15/src/soc/intel/common/block... PS15, Line 68: * +--------------v-------------------------------+ ext_win_host_base + line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/15/src/soc/intel/common/block... PS15, Line 69: * | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/15/src/soc/intel/common/block... PS15, Line 70: * | Unused | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/15/src/soc/intel/common/block... PS15, Line 71: * | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/15/src/soc/intel/common/block... PS15, Line 72: * +--------------+ CONFIG_EXT_BIOS_WIN_BASE+--v line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
Patch Set 16:
(13 comments)
https://review.coreboot.org/c/coreboot/+/47659/16/src/soc/intel/common/block... File src/soc/intel/common/block/fast_spi/mmap_boot.c:
https://review.coreboot.org/c/coreboot/+/47659/16/src/soc/intel/common/block... PS16, Line 43: * ^ +------------+--------------------------^--------------------------------+ 0xffffffff line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/16/src/soc/intel/common/block... PS16, Line 53: * | | | fixed_win_flash_base+----v--------------------------------+ fixed_win_host_base line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/16/src/soc/intel/common/block... PS16, Line 62: * | | | +-----^------------------------------------------------------------^ line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/16/src/soc/intel/common/block... PS16, Line 63: * 0 +------------+ | | | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/16/src/soc/intel/common/block... PS16, Line 64: * | + | EXT_BIOS | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/16/src/soc/intel/common/block... PS16, Line 65: * SPI flash | ext_win_size | DECODE | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/16/src/soc/intel/common/block... PS16, Line 66: * address | + | WINDOW | + line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/16/src/soc/intel/common/block... PS16, Line 67: * space | | | | CONFIG_EXT_BIOS_WIN_SIZE line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/16/src/soc/intel/common/block... PS16, Line 68: * +--------------v-------------------------------+ ext_win_host_base + line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/16/src/soc/intel/common/block... PS16, Line 69: * | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/16/src/soc/intel/common/block... PS16, Line 70: * | Unused | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/16/src/soc/intel/common/block... PS16, Line 71: * | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/16/src/soc/intel/common/block... PS16, Line 72: * +--------------+ CONFIG_EXT_BIOS_WIN_BASE+--v line over 96 characters
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
Patch Set 16:
(3 comments)
https://review.coreboot.org/c/coreboot/+/47659/16/src/soc/intel/common/block... File src/soc/intel/common/block/fast_spi/Kconfig:
https://review.coreboot.org/c/coreboot/+/47659/16/src/soc/intel/common/block... PS16, Line 20: (r nit: space before (
https://review.coreboot.org/c/coreboot/+/47659/16/src/soc/intel/common/block... PS16, Line 27: r map *the* rest
https://review.coreboot.org/c/coreboot/+/47659/16/src/soc/intel/common/block... PS16, Line 56: default n I think it still needs the `bool` here?
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Tim Wawrzynczak, Duncan Laurie, Srinidhi N Kaushik, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47659
to look at the new patch set (#18).
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
soc/intel/common/fast_spi: Add custom boot media device
This change enables support for a custom boot media device in fast SPI controller driver if the platform supports additional decode window for mapping BIOS regions greater than 16MiB. Following new Kconfigs are added: 1. FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW: SoC can select this to indicate support for extended BIOS window. 2. EXT_BIOS_WIN_BASE: If FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW is selected, this provides the base address of the host space that is reserved for mapping the extended window. 3. EXT_BIOS_WIN_SIZE: If FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW is selected, this provides the size of the host space reserved for mapping extended window.
If platform indicates support for extended BIOS decode window, cbfstool add command is provided additional parameters for the decode window using --ext-win-base and --ext-win-size.
It is the responsibility of the mainboard fmap author to ensure that the sections in the BIOS region do not cross 16MiB boundary as the host space windows are not contiguous. This change adds a build time check to ensure no sections in FMAP cross the 16MiB boundary.
Even though the platform supports extended window, it depends upon the size of BIOS region (which in turn depends on SPI flash size) whether and how much of the additional window is utilized at runtime. This change also provides helper functions for rest of the coreboot components to query how much of the extended window is actually utilized.
BUG=b:171534504
Change-Id: I1b564aed9809cf14b40a3b8e907622266fc782e2 Signed-off-by: Furquan Shaikh furquan@google.com --- M src/soc/intel/common/block/fast_spi/Kconfig M src/soc/intel/common/block/fast_spi/Makefile.inc A src/soc/intel/common/block/fast_spi/mmap_boot.c M src/soc/intel/common/block/include/intelblocks/fast_spi.h 4 files changed, 246 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/47659/18
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
Patch Set 18:
(3 comments)
https://review.coreboot.org/c/coreboot/+/47659/16/src/soc/intel/common/block... File src/soc/intel/common/block/fast_spi/Kconfig:
https://review.coreboot.org/c/coreboot/+/47659/16/src/soc/intel/common/block... PS16, Line 20: (r
nit: space before (
Done
https://review.coreboot.org/c/coreboot/+/47659/16/src/soc/intel/common/block... PS16, Line 27: r
map *the* rest
Done
https://review.coreboot.org/c/coreboot/+/47659/16/src/soc/intel/common/block... PS16, Line 56: default n
I think it still needs the `bool` here?
As per https://doc.coreboot.org/getting_started/kconfig.html#notes: "Only the first type definition for each symbol is valid. Further matching definitions are fine, although unnecessary. Conflicting type definitions will be ignored, and a warning will be presented on the console where the configuration front end was run: warning: ignoring type redefinition of ‘SYMBOL’ from ‘hex’ to ‘integer’."
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
Patch Set 18:
(13 comments)
https://review.coreboot.org/c/coreboot/+/47659/18/src/soc/intel/common/block... File src/soc/intel/common/block/fast_spi/mmap_boot.c:
https://review.coreboot.org/c/coreboot/+/47659/18/src/soc/intel/common/block... PS18, Line 43: * ^ +------------+--------------------------^--------------------------------+ 0xffffffff line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/18/src/soc/intel/common/block... PS18, Line 53: * | | | fixed_win_flash_base+----v--------------------------------+ fixed_win_host_base line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/18/src/soc/intel/common/block... PS18, Line 62: * | | | +-----^------------------------------------------------------------^ line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/18/src/soc/intel/common/block... PS18, Line 63: * 0 +------------+ | | | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/18/src/soc/intel/common/block... PS18, Line 64: * | + | EXT_BIOS | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/18/src/soc/intel/common/block... PS18, Line 65: * SPI flash | ext_win_size | DECODE | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/18/src/soc/intel/common/block... PS18, Line 66: * address | + | WINDOW | + line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/18/src/soc/intel/common/block... PS18, Line 67: * space | | | | CONFIG_EXT_BIOS_WIN_SIZE line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/18/src/soc/intel/common/block... PS18, Line 68: * +--------------v-------------------------------+ ext_win_host_base + line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/18/src/soc/intel/common/block... PS18, Line 69: * | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/18/src/soc/intel/common/block... PS18, Line 70: * | Unused | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/18/src/soc/intel/common/block... PS18, Line 71: * | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/18/src/soc/intel/common/block... PS18, Line 72: * +--------------+ CONFIG_EXT_BIOS_WIN_BASE+--v line over 96 characters
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
Patch Set 18: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/47659/16/src/soc/intel/common/block... File src/soc/intel/common/block/fast_spi/Kconfig:
https://review.coreboot.org/c/coreboot/+/47659/16/src/soc/intel/common/block... PS16, Line 56: default n
As per https://doc.coreboot.org/getting_started/kconfig.html#notes: […]
Gotcha thanks, I guess the one in apollolake/Kconfig is extraneous then
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
Patch Set 19:
(13 comments)
https://review.coreboot.org/c/coreboot/+/47659/19/src/soc/intel/common/block... File src/soc/intel/common/block/fast_spi/mmap_boot.c:
https://review.coreboot.org/c/coreboot/+/47659/19/src/soc/intel/common/block... PS19, Line 43: * ^ +------------+--------------------------^--------------------------------+ 0xffffffff line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/19/src/soc/intel/common/block... PS19, Line 53: * | | | fixed_win_flash_base+----v--------------------------------+ fixed_win_host_base line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/19/src/soc/intel/common/block... PS19, Line 62: * | | | +-----^------------------------------------------------------------^ line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/19/src/soc/intel/common/block... PS19, Line 63: * 0 +------------+ | | | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/19/src/soc/intel/common/block... PS19, Line 64: * | + | EXT_BIOS | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/19/src/soc/intel/common/block... PS19, Line 65: * SPI flash | ext_win_size | DECODE | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/19/src/soc/intel/common/block... PS19, Line 66: * address | + | WINDOW | + line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/19/src/soc/intel/common/block... PS19, Line 67: * space | | | | CONFIG_EXT_BIOS_WIN_SIZE line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/19/src/soc/intel/common/block... PS19, Line 68: * +--------------v-------------------------------+ ext_win_host_base + line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/19/src/soc/intel/common/block... PS19, Line 69: * | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/19/src/soc/intel/common/block... PS19, Line 70: * | Unused | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/19/src/soc/intel/common/block... PS19, Line 71: * | | | line over 96 characters
https://review.coreboot.org/c/coreboot/+/47659/19/src/soc/intel/common/block... PS19, Line 72: * +--------------+ CONFIG_EXT_BIOS_WIN_BASE+--v line over 96 characters
Furquan Shaikh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47659 )
Change subject: soc/intel/common/fast_spi: Add custom boot media device ......................................................................
soc/intel/common/fast_spi: Add custom boot media device
This change enables support for a custom boot media device in fast SPI controller driver if the platform supports additional decode window for mapping BIOS regions greater than 16MiB. Following new Kconfigs are added: 1. FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW: SoC can select this to indicate support for extended BIOS window. 2. EXT_BIOS_WIN_BASE: If FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW is selected, this provides the base address of the host space that is reserved for mapping the extended window. 3. EXT_BIOS_WIN_SIZE: If FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW is selected, this provides the size of the host space reserved for mapping extended window.
If platform indicates support for extended BIOS decode window, cbfstool add command is provided additional parameters for the decode window using --ext-win-base and --ext-win-size.
It is the responsibility of the mainboard fmap author to ensure that the sections in the BIOS region do not cross 16MiB boundary as the host space windows are not contiguous. This change adds a build time check to ensure no sections in FMAP cross the 16MiB boundary.
Even though the platform supports extended window, it depends upon the size of BIOS region (which in turn depends on SPI flash size) whether and how much of the additional window is utilized at runtime. This change also provides helper functions for rest of the coreboot components to query how much of the extended window is actually utilized.
BUG=b:171534504
Change-Id: I1b564aed9809cf14b40a3b8e907622266fc782e2 Signed-off-by: Furquan Shaikh furquan@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/47659 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/soc/intel/common/block/fast_spi/Kconfig M src/soc/intel/common/block/fast_spi/Makefile.inc A src/soc/intel/common/block/fast_spi/mmap_boot.c M src/soc/intel/common/block/include/intelblocks/fast_spi.h 4 files changed, 246 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/soc/intel/common/block/fast_spi/Kconfig b/src/soc/intel/common/block/fast_spi/Kconfig index 9369272..eb2373c 100644 --- a/src/soc/intel/common/block/fast_spi/Kconfig +++ b/src/soc/intel/common/block/fast_spi/Kconfig @@ -11,3 +11,48 @@ default y help Disable the write status SPI opcode in Intel Fast SPI block. + +config FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW + bool + depends on SOC_INTEL_COMMON_BLOCK_FAST_SPI + help + Fast SPI controller on the platform supports additional + window for memory mapping BIOS region (region 1) on the SPI + flash beyond the standard limit of 16MiB. Depending upon the + size of the SPI flash part used by the mainboard, two decode + windows will be enabled: + 1. Fixed decode window up to a maximum size of 16MiB under + 4G boundary. + 2. Extended decode window up to a maximum size provided by + the platform to map the rest of the BIOS region. + SoC selecting this config is expected to provide the base and + maximum size of the extended window in the host address space + using configs EXT_BIOS_WIN_BASE and EXT_BIOS_WIN_SIZE. + +config EXT_BIOS_WIN_BASE + hex + help + If an additional window for mapping BIOS region greater than + 16MiB is supported, then this config is used to provide the + base address reserved for the mapping. Since the mapping is + done at the top of the window, depending upon the size of the + BIOS region, the actual base address configured in the fast + SPI controller can be higher at runtime. + +config EXT_BIOS_WIN_SIZE + hex + help + Maximum size of the extended window reserved for mapping BIOS + region greater than 16MiB. The actual mapped window might be + smaller depending upon the size of the BIOS region. + +if FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW + +# Disable X86_TOP4G_BOOTMEDIA_MAP because the fast SPI controller +# driver provides a custom boot media device when multiple decode +# windows are used for the BIOS region. + +config X86_TOP4G_BOOTMEDIA_MAP + default n + +endif diff --git a/src/soc/intel/common/block/fast_spi/Makefile.inc b/src/soc/intel/common/block/fast_spi/Makefile.inc index e5b50aa..79a2f97 100644 --- a/src/soc/intel/common/block/fast_spi/Makefile.inc +++ b/src/soc/intel/common/block/fast_spi/Makefile.inc @@ -19,3 +19,35 @@ endif
CPPFLAGS_common += -I$(src)/soc/intel/common/block/fast_spi + +ifeq ($(CONFIG_FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW),y) + +# mmap_boot.c provides a custom boot media device for the platforms that support +# additional window for BIOS regions greater than 16MiB. This is used instead of +# the default boot media device in arch/x86/mmap_boot.c +bootblock-y += mmap_boot.c +verstage-y += mmap_boot.c +romstage-y += mmap_boot.c +postcar-y += mmap_boot.c +ramstage-y += mmap_boot.c +smm-y += mmap_boot.c + +# Check to ensure that no sections in the FMAP cross 16MiB boundary if +# the platform supports split decode windows for BIOS region greater +# than 16MiB. +check-fmap-16mib-crossing: $(obj)/fmap_config.h + flash_offset=$$(printf "%d" $$(cat $(obj)/fmap_config.h | grep "FMAP_SECTION_FLASH_START" | awk '{print $$NF}')); \ + for x in $$(cat $(obj)/fmap_config.h | grep "FMAP_TERMINAL_SECTIONS" | cut -d" -f2); do \ + start=$$(printf "%d" $$(cat $(obj)/fmap_config.h | grep "FMAP_SECTION_"$$x"_START" | awk '{print $$NF}')); \ + size=$$(printf "%d" $$(cat $(obj)/fmap_config.h | grep "FMAP_SECTION_"$$x"_SIZE" | awk '{print $$NF}')); \ + start=$$((start-flash_offset)); \ + end=$$((start+size-1)); \ + if [ $$start -lt 16777216 ] && [ $$end -ge 16777216 ]; then echo "ERROR:" $$x "crosses 16MiB boundary"; fail=1; break; fi; \ + done; \ + if [ $$fail -eq 1 ]; then false; fi + +INTERMEDIATE+=check-fmap-16mib-crossing + +CBFSTOOL_ADD_CMD_OPTIONS += --ext-win-base $(CONFIG_EXT_BIOS_WIN_BASE) --ext-win-size $(CONFIG_EXT_BIOS_WIN_SIZE) + +endif # CONFIG_FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW diff --git a/src/soc/intel/common/block/fast_spi/mmap_boot.c b/src/soc/intel/common/block/fast_spi/mmap_boot.c new file mode 100644 index 0000000..8435a85 --- /dev/null +++ b/src/soc/intel/common/block/fast_spi/mmap_boot.c @@ -0,0 +1,162 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +/* + * This file provides a custom boot media device for the platforms that support additional + * window for BIOS regions greater than 16MiB. If the mainboard uses a smaller BIOS region, then + * the additional window is unused. + */ + +#include <boot_device.h> +#include <commonlib/region.h> +#include <console/console.h> +#include <fmap.h> +#include <intelblocks/fast_spi.h> + +enum window_type { + /* Fixed decode window of max 16MiB size just below 4G boundary */ + FIXED_DECODE_WINDOW, + /* Additional decode window for mapping BIOS region greater than 16MiB */ + EXT_BIOS_DECODE_WINDOW, + TOTAL_DECODE_WINDOWS, +}; + +static struct xlate_region_device real_dev; +static struct mem_region_device shadow_devs[TOTAL_DECODE_WINDOWS]; +static struct xlate_window real_dev_windows[TOTAL_DECODE_WINDOWS]; + +static void initialize_window(enum window_type type, uintptr_t host_base, + uintptr_t flash_base, size_t size) +{ + mem_region_device_ro_init(&shadow_devs[type], (void *)host_base, size); + xlate_window_init(&real_dev_windows[type], &shadow_devs[type].rdev, + flash_base, size); + printk(BIOS_INFO, "MMAP window: SPI flash base=0x%lx, Host base=0x%lx, Size=0x%zx\n", + flash_base, host_base, size); +} + +/* + * + * +--------------+ + * | | + * | | + * | | + * ^ +------------+--------------------------^--------------------------------+ 0xffffffff + * | | | | | | + * | | | | | | + * | | | + | FIXED | + * | | | fixed_win_size | DECODE | + * | | BIOS | + | WINDOW | + * + | region | | | | + * bios_size | (Region 1) | | | | + * + | | | | | + * | | | | | | + * | | | fixed_win_flash_base+----v--------------------------------+ fixed_win_host_base + * | | | | | | + * | | | | | | + * | | | | | Other MMIO | + * v | | | | | + * bios_start +------------+ ext_win_flash_base | | | + * | | + | | | + * | | | | | | + * | | | | | | + * | | | +-----^------------------------------------------------------------^ + * 0 +------------+ | | | | | + * | + | EXT_BIOS | | + * SPI flash | ext_win_size | DECODE | | + * address | + | WINDOW | + + * space | | | | CONFIG_EXT_BIOS_WIN_SIZE + * +--------------v-------------------------------+ ext_win_host_base + + * | | | + * | Unused | | + * | | | + * +--------------+ CONFIG_EXT_BIOS_WIN_BASE+--v + * | | + * | | + * | | + * +--------------+ + * + * Host address + * space + */ +static void bios_mmap_init(void) +{ + static bool init_done; + + size_t bios_size, bios_start; + + uintptr_t fixed_win_host_base, fixed_win_flash_base; + uintptr_t ext_win_host_base, ext_win_flash_base; + size_t fixed_win_size, ext_win_size; + + size_t win_count = 0; + + if (init_done) + return; + + /* Read the offset and size of BIOS region in the SPI flash address space. */ + bios_start = fast_spi_get_bios_region(&bios_size); + + /* + * By default, fixed decode window (maximum size 16MiB) is mapped just below the 4G + * boundary. This window maps the top part of the BIOS region in the SPI flash address + * space to the host address space. + */ + fixed_win_size = MIN(16 * MiB, bios_size); + fixed_win_host_base = 4ULL * GiB - fixed_win_size; + fixed_win_flash_base = bios_start + bios_size - fixed_win_size; + + initialize_window(FIXED_DECODE_WINDOW, fixed_win_host_base, fixed_win_flash_base, + fixed_win_size); + win_count++; + + _Static_assert(CONFIG_EXT_BIOS_WIN_BASE != 0, "Extended BIOS window base cannot be 0!"); + _Static_assert(CONFIG_EXT_BIOS_WIN_SIZE != 0, "Extended BIOS window size cannot be 0!"); + + /* + * Remaining portion of the BIOS region up to a maximum of CONFIG_EXT_BIOS_WIN_SIZE is + * mapped at the top of the extended window if the BIOS region is greater than 16MiB. + * + * If the BIOS region is not greater than 16MiB, then the extended window is not + * enabled. + */ + ext_win_size = MIN(CONFIG_EXT_BIOS_WIN_SIZE, bios_size - fixed_win_size); + + if (ext_win_size) { + ext_win_host_base = CONFIG_EXT_BIOS_WIN_BASE + CONFIG_EXT_BIOS_WIN_SIZE - + ext_win_size; + ext_win_flash_base = fixed_win_flash_base - ext_win_size; + initialize_window(EXT_BIOS_DECODE_WINDOW, ext_win_host_base, + ext_win_flash_base, ext_win_size); + win_count++; + } + + xlate_region_device_ro_init(&real_dev, win_count, real_dev_windows, CONFIG_ROM_SIZE); + + init_done = true; +} + +const struct region_device *boot_device_ro(void) +{ + bios_mmap_init(); + + return &real_dev.rdev; +} + +void fast_spi_get_ext_bios_window(uintptr_t *base, size_t *size) +{ + const struct region_device *rd = &shadow_devs[EXT_BIOS_DECODE_WINDOW].rdev; + + bios_mmap_init(); + + *size = region_device_sz(rd); + + if (*size == 0) { + *base = 0; + } else { + /* + * This is a memory region device. So, mmap returns the base address of the + * device. Also, as this is a memory region device, unmap is a no-op. + */ + *base = (uintptr_t)rdev_mmap_full(rd); + } +} diff --git a/src/soc/intel/common/block/include/intelblocks/fast_spi.h b/src/soc/intel/common/block/include/intelblocks/fast_spi.h index 52ffdb3..0a7e64d 100644 --- a/src/soc/intel/common/block/include/intelblocks/fast_spi.h +++ b/src/soc/intel/common/block/include/intelblocks/fast_spi.h @@ -74,4 +74,11 @@ */ void fast_spi_enable_wp(void);
+/* + * Get base and size of extended BIOS decode window used at runtime in host address space. If + * the BIOS region is not greater than 16MiB, then this function returns 0 for both base and + * size. + */ +void fast_spi_get_ext_bios_window(uintptr_t *base, size_t *size); + #endif /* SOC_INTEL_COMMON_BLOCK_FAST_SPI_H */
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