Change in ...coreboot[master]: riscv: Fix MENTRY_FRAME_SIZE to fit different machine lengths

[Xiang Wang (Code Review)]

Xiang Wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31976

Change subject: riscv: Fix MENTRY_FRAME_SIZE to fit different machine lengths
......................................................................

riscv: Fix MENTRY_FRAME_SIZE to fit different machine lengths

Change-Id: Iabe390963bcbeb9ec6016faa8312d101431942da
Signed-off-by: Xiang Wang 
---
M src/arch/riscv/include/mcall.h
1 file changed, 4 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/31976/1

diff --git a/src/arch/riscv/include/mcall.h b/src/arch/riscv/include/mcall.h
index 192d2b4..652d21b 100644
--- a/src/arch/riscv/include/mcall.h
+++ b/src/arch/riscv/include/mcall.h
@@ -20,14 +20,16 @@
 // nice to have.
 #if __riscv_xlen == 64
 #define HLS_SIZE 88
+/* We save 37 registers, currently. */
+#define MENTRY_FRAME_SIZE (HLS_SIZE + 37 * 8)
 #endif

#if __riscv_xlen == 32
 #define HLS_SIZE 52
+/* We save 37 registers, currently. */
+#define MENTRY_FRAME_SIZE (HLS_SIZE + 37 * 4)
 #endif

-/* We save 37 registers, currently. */
-#define MENTRY_FRAME_SIZE (HLS_SIZE + 37 * 8)

#ifndef __ASSEMBLER__

[Xiang Wang (Code Review)]

Hello ron minnich, Shawn C, Jonathan Neuschäfer, Philipp Hug,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/31976

to look at the new patch set (#2).

Change subject: riscv: Fix MENTRY_FRAME_SIZE to fit different machine lengths
......................................................................

riscv: Fix MENTRY_FRAME_SIZE to fit different machine lengths

Change-Id: Iabe390963bcbeb9ec6016faa8312d101431942da
Signed-off-by: Xiang Wang 
---
M src/arch/riscv/include/mcall.h
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/31976/2

[Philipp Hug (Code Review)]

Philipp Hug has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31976 )

Change subject: riscv: Fix MENTRY_FRAME_SIZE to fit different machine lengths
......................................................................

Patch Set 2: Code-Review+1

[Xiang Wang (Code Review)]

Hello ron minnich, Shawn C, Jonathan Neuschäfer, build bot (Jenkins), Philipp Hug,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/31976

to look at the new patch set (#3).

Change subject: riscv: Fix MENTRY_FRAME_SIZE to fit different machine lengths
......................................................................

riscv: Fix MENTRY_FRAME_SIZE to fit different machine lengths

Change-Id: Iabe390963bcbeb9ec6016faa8312d101431942da
Signed-off-by: Xiang Wang 
---
M src/arch/riscv/include/mcall.h
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/31976/3

[Xiang Wang (Code Review)]

Xiang Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31976 )

Change subject: riscv: Fix MENTRY_FRAME_SIZE to fit different machine lengths
......................................................................

Patch Set 3: Code-Review+2

[Philipp Hug (Code Review)]

Philipp Hug has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31976 )

Change subject: riscv: Fix MENTRY_FRAME_SIZE to fit different machine lengths
......................................................................

Patch Set 5: Code-Review+2

Thanks

[Patrick Rudolph (Code Review)]

Patrick Rudolph has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31976 )

Change subject: riscv: Fix MENTRY_FRAME_SIZE to fit different machine lengths
......................................................................

riscv: Fix MENTRY_FRAME_SIZE to fit different machine lengths

Change-Id: Iabe390963bcbeb9ec6016faa8312d101431942da
Signed-off-by: Xiang Wang 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31976
Tested-by: build bot (Jenkins) 
Reviewed-by: Philipp Hug 
---
M src/arch/riscv/include/mcall.h
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Xiang Wang: Looks good to me, approved
  Philipp Hug: Looks good to me, approved

diff --git a/src/arch/riscv/include/mcall.h b/src/arch/riscv/include/mcall.h
index 192d2b4..d7d67ce 100644
--- a/src/arch/riscv/include/mcall.h
+++ b/src/arch/riscv/include/mcall.h
@@ -27,7 +27,7 @@
 #endif

/* We save 37 registers, currently. */
-#define MENTRY_FRAME_SIZE (HLS_SIZE + 37 * 8)
+#define MENTRY_FRAME_SIZE (HLS_SIZE + 37 * __SIZEOF_POINTER__)

#ifndef __ASSEMBLER__