Attention is currently required from: Michael Niewöhner, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55250 )
Change subject: [WIP] src/superio/smsc: Add support for the SCH5555 ......................................................................
Patch Set 4:
(2 comments)
File src/superio/smsc/sch5555/ramstage.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120877): https://review.coreboot.org/c/coreboot/+/55250/comment/7854b456_1b8eaea7 PS4, Line 88: pnp_write_config(lpci, SCH5555_LPCI_IRQ_CONF + irq, dev->path.pnp.device | 0x80); line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120877): https://review.coreboot.org/c/coreboot/+/55250/comment/7d5fbb99_777d2c28 PS4, Line 152: { NULL, SCH5555_LDN_PARPORT, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_MSC0 | PNP_MSC1, 0x0ff8 }, line over 96 characters