Change in coreboot[master]: mb/intel/dg41wv: Expose some SIO devices via devicetree

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/27120

Change subject: mb/intel/dg41wv: Expose some SIO devices via devicetree
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mb/intel/dg41wv: Expose some SIO devices via devicetree

Change-Id: Ia658c117434c3fae45bbbe6c472ca58ba4f1a117
Signed-off-by: Arthur Heymans 
---
M src/mainboard/intel/dg41wv/acpi/superio.asl
1 file changed, 28 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/27120/1

diff --git a/src/mainboard/intel/dg41wv/acpi/superio.asl b/src/mainboard/intel/dg41wv/acpi/superio.asl
index 2997587..3185a0b 100644
--- a/src/mainboard/intel/dg41wv/acpi/superio.asl
+++ b/src/mainboard/intel/dg41wv/acpi/superio.asl
@@ -1 +1,28 @@
-/* dummy */
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#undef SUPERIO_DEV
+#undef SUPERIO_PNP_BASE
+#undef W83627DHG_SHOW_UARTA
+#undef W83627DHG_SHOW_UARTB
+#undef W83627DHG_SHOW_KBC
+#undef W83627DHG_SHOW_PS2M
+#undef W83627DHG_SHOW_HWMON
+#define SUPERIO_DEV		SIO0
+#define SUPERIO_PNP_BASE	0x2e
+#define W83627DHG_SHOW_UARTA	1
+#define W83627DHG_SHOW_UARTB	1
+#define W83627DHG_SHOW_KBC
+#define W83627DHG_SHOW_PS2M
+#define W83627DHG_SHOW_HWMON
+#include <superio/winbond/w83627dhg/acpi/superio.asl>