Change in coreboot[master]: x86_64 assembly: Don't touch %gs

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59764 )

Change subject: x86_64 assembly: Don't touch %gs
......................................................................

x86_64 assembly: Don't touch %gs

With CPU_INFO_V2 enabled %gs holds the pointer to the cpu_info struct,
so don't clobber it. Backup and restore %gs where possible.
Fixes a crash in MPinit seen after calling FSP-S.

Change-Id: If9fc999b34530de5d8b6ad27b9af25fc552e9420
Signed-off-by: Patrick Rudolph 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59764
Tested-by: build bot (Jenkins) 
Reviewed-by: Arthur Heymans 
---
M src/cpu/x86/64bit/exit32.inc
M src/cpu/x86/64bit/mode_switch.S
M src/security/intel/txt/getsec_enteraccs.S
3 files changed, 16 insertions(+), 5 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Arthur Heymans: Looks good to me, approved

diff --git a/src/cpu/x86/64bit/exit32.inc b/src/cpu/x86/64bit/exit32.inc
index 4d1149e..3ac86a9 100644
--- a/src/cpu/x86/64bit/exit32.inc
+++ b/src/cpu/x86/64bit/exit32.inc
@@ -68,7 +68,6 @@
    movl	%eax, %es
    movl	%eax, %ss
    movl	%eax, %fs
-	movl	%eax, %gs

/* Disable paging. */
    movl	%cr0, %eax
diff --git a/src/cpu/x86/64bit/mode_switch.S b/src/cpu/x86/64bit/mode_switch.S
index eea104b..c27f540 100644
--- a/src/cpu/x86/64bit/mode_switch.S
+++ b/src/cpu/x86/64bit/mode_switch.S
@@ -15,6 +15,10 @@
    push	%r14
    push	%r15

+	/* Backup gs to stack */
+	movl	%gs, %eax
+	push	%rax
+
    /* Arguments to stack */
    push	%rdi
    push	%rsi
@@ -23,9 +27,9 @@

#include <cpu/x86/64bit/exit32.inc>

-	movl	-48(%ebp), %eax	/* Argument count */
-	movl	-64(%ebp), %edx	/* Argument 0 */
-	movl	-72(%ebp), %ecx	/* Argument 1 */
+	movl	-56(%ebp), %eax	/* Argument count */
+	movl	-72(%ebp), %edx	/* Argument 0 */
+	movl	-80(%ebp), %ecx	/* Argument 1 */

/* Align the stack */
    andl	$0xFFFFFFF0, %esp
@@ -46,7 +50,7 @@
    pushl	%edx	/* Argument 0 */

1:
-	movl	-56(%ebp), %ebx	/* Function to call */
+	movl	-64(%ebp), %ebx	/* Function to call */
    call	*%ebx
    movl	%eax, %ebx

@@ -57,6 +61,8 @@
    movl	%ebx, %eax

/* Restore registers */
+	mov	-48(%rbp), %rbx
+	movl	%ebx, %gs
    mov	-40(%rbp), %r15
    mov	-32(%rbp), %r14
    mov	-24(%rbp), %r13
diff --git a/src/security/intel/txt/getsec_enteraccs.S b/src/security/intel/txt/getsec_enteraccs.S
index 09f9f38..cbb24b6 100644
--- a/src/security/intel/txt/getsec_enteraccs.S
+++ b/src/security/intel/txt/getsec_enteraccs.S
@@ -227,6 +227,10 @@
    movd	%esp, %xmm0
    movd	%ebp, %xmm1

+	/* Backup %gs used by CPU_INFO_V2 */
+	movl	%gs, %eax
+	movd	%eax, %xmm2
+
    /*
     * Get function arguments.
     * It's important to pass the exact ACM size as it's used by getsec to verify
@@ -261,6 +265,8 @@
    movl	%eax, %es
    movl	%eax, %ss
    movl	%eax, %fs
+	/* Restore %gs used by CPU_INFO_V2 */
+	movd	%xmm2, %eax
    movl	%eax, %gs

/* Disable cache */