You-Cheng Syu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33166
Change subject: mediatek/mt8183: Use GPIO based CS for SPI0 ......................................................................
mediatek/mt8183: Use GPIO based CS for SPI0
Some boards (e.g., Kukui) needs GPIO based CS for SPI0. This CL changes the pinmux and binds the pin to SPI0.
BUG=b:132311067 TEST=Verified that b/132311067 is irreproducible now.
Change-Id: Id4248b3f146a1f1b44124f7a2671dbbc824eda01 --- M src/soc/mediatek/mt8183/spi.c 1 file changed, 4 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/33166/1
diff --git a/src/soc/mediatek/mt8183/spi.c b/src/soc/mediatek/mt8183/spi.c index a79dafb..cb35c63 100644 --- a/src/soc/mediatek/mt8183/spi.c +++ b/src/soc/mediatek/mt8183/spi.c @@ -21,9 +21,12 @@ #include <soc/gpio.h> #include <soc/spi.h>
+static gpio_t spi0_cs = GPIO(SPI_CSB); + struct mtk_spi_bus spi_bus[SPI_BUS_NUMBER] = { { .regs = (void *)SPI0_BASE, + .cs_gpio = &spi0_cs, }, { .regs = (void *)SPI1_BASE, @@ -52,7 +55,7 @@ static const struct pad_func pad0_funcs[SPI_BUS_NUMBER][4] = { { PAD_FUNC(SPI_MI, SPI0_MI), - PAD_FUNC(SPI_CSB, SPI0_CSB), + {PAD_SPI_CSB_ID, 0}, PAD_FUNC(SPI_MO, SPI0_MO), PAD_FUNC(SPI_CLK, SPI0_CLK), },
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33166
to look at the new patch set (#2).
Change subject: mediatek/mt8183: Use GPIO based CS for SPI0 ......................................................................
mediatek/mt8183: Use GPIO based CS for SPI0
Some boards (e.g., Kukui) needs GPIO based CS for SPI0. This CL changes the pinmux and binds the pin to SPI0.
BUG=b:132311067 TEST=Verified that b/132311067 is irreproducible now.
Change-Id: Id4248b3f146a1f1b44124f7a2671dbbc824eda01 Signed-off-by: You-Cheng Syu youcheng@google.com --- M src/soc/mediatek/mt8183/spi.c 1 file changed, 4 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/33166/2
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33166 )
Change subject: mediatek/mt8183: Use GPIO based CS for SPI0 ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/33166/2/src/soc/mediatek/mt8183/spi.c File src/soc/mediatek/mt8183/spi.c:
https://review.coreboot.org/#/c/33166/2/src/soc/mediatek/mt8183/spi.c@58 PS2, Line 58: {PAD_SPI_CSB_ID, 0}, as your commit description described, this is actually a per-board logic and should not be hard-coded here (as soc/ implementation).
Assuming GPIOs can be programmed multiple times (which should be), maybe we can refactor mtk_spi_init or mtk_spi_set_gpio_pinmux so it'll take additional GPIO arguments for CS; and do teh general pad func first then re-program as GPIO(output).
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33166 )
Change subject: mediatek/mt8183: Use GPIO based CS for SPI0 ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/33166/2/src/soc/mediatek/mt8183/spi... File src/soc/mediatek/mt8183/spi.c:
https://review.coreboot.org/c/coreboot/+/33166/2/src/soc/mediatek/mt8183/spi... PS2, Line 58: {PAD_SPI_CSB_ID, 0},
as your commit description described, this is actually a per-board logic and should not be hard-code […]
hungte: This is no longer an issue, right?
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33166 )
Change subject: mediatek/mt8183: Use GPIO based CS for SPI0 ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/33166/2/src/soc/mediatek/mt8183/spi... File src/soc/mediatek/mt8183/spi.c:
https://review.coreboot.org/c/coreboot/+/33166/2/src/soc/mediatek/mt8183/spi... PS2, Line 58: {PAD_SPI_CSB_ID, 0},
hungte: This is no longer an issue, right?
You can forget about this since we'll be doing always GPIO.
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33166 )
Change subject: mediatek/mt8183: Use GPIO based CS for SPI0 ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/33166/2/src/soc/mediatek/mt8183/spi... File src/soc/mediatek/mt8183/spi.c:
https://review.coreboot.org/c/coreboot/+/33166/2/src/soc/mediatek/mt8183/spi... PS2, Line 58: {PAD_SPI_CSB_ID, 0},
You can forget about this since we'll be doing always GPIO.
Ack
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33166 )
Change subject: mediatek/mt8183: Use GPIO based CS for SPI0 ......................................................................
Patch Set 2: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/33166/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/33166/2//COMMIT_MSG@9 PS2, Line 9: needs need
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33166 )
Change subject: mediatek/mt8183: Use GPIO based CS for SPI0 ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/33166/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/33166/2//COMMIT_MSG@9 PS2, Line 9: needs
need
This patch has been combined with the previous one. See https://review.coreboot.org/c/coreboot/+/33165/3.
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33166 )
Change subject: mediatek/mt8183: Use GPIO based CS for SPI0 ......................................................................
Patch Set 2:
@youcheng Please abandon this CL since we only need https://review.coreboot.org/c/coreboot/+/33165.
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33166 )
Change subject: mediatek/mt8183: Use GPIO based CS for SPI0 ......................................................................
Patch Set 2: Code-Review-1
Should be abandoned.
You-Cheng Syu has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/33166 )
Change subject: mediatek/mt8183: Use GPIO based CS for SPI0 ......................................................................
Abandoned
-
Hung-Te Lin (Code Review) -
Paul Menzel (Code Review)
-
You-Cheng Syu (Code Review)
-
Yu-Ping Wu (Code Review)