Change in coreboot[master]: nb/intel/i945(gc): Set CxDRT1 tRPALL bit if populated with 8-bank

[HAOUAS Elyes (Code Review)]

Hello build bot (Jenkins), Nico Huber, Patrick Georgi, Paul Menzel, Angel Pons, Arthur Heymans, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/28648

to look at the new patch set (#16).

Change subject: nb/intel/i945(gc): Set CxDRT1 tRPALL bit if populated with 8-bank
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nb/intel/i945(gc): Set CxDRT1 tRPALL bit if populated with 8-bank

Regarding "Mobile Intel® 945 Express Chipset Family - June 2008"
datasheet, page #129, CxDRT1 bit #16 "Pre-All to Activate Delay"
must be set if any rank is populated with 8-bank device technology.

Change-Id: Id6c7dccd295e187acfe00a08294010af53b4d0ee
Signed-off-by: Elyes HAOUAS 
---
M src/northbridge/intel/i945/raminit_i945gc.c
1 file changed, 6 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/28648/16