HAOUAS Elyes uploaded patch set #16 to this change.

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nb/intel/i945(gc): Set CxDRT1 tRPALL bit if populated with 8-bank

Regarding "Mobile IntelĀ® 945 Express Chipset Family - June 2008"
datasheet, page #129, CxDRT1 bit #16 "Pre-All to Activate Delay"
must be set if any rank is populated with 8-bank device technology.

Change-Id: Id6c7dccd295e187acfe00a08294010af53b4d0ee
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
---
M src/northbridge/intel/i945/raminit_i945gc.c
1 file changed, 6 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/28648/16

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Id6c7dccd295e187acfe00a08294010af53b4d0ee
Gerrit-Change-Number: 28648
Gerrit-PatchSet: 16
Gerrit-Owner: HAOUAS Elyes <ehaouas@noos.fr>
Gerrit-Reviewer: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: Arthur Heymans <arthur@aheymans.xyz>
Gerrit-Reviewer: HAOUAS Elyes <ehaouas@noos.fr>
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