Change in ...coreboot[master]: nb/i945: Refactor sdram_rcomp_buffer_strength_and_slew for i945GC

[HAOUAS Elyes (Code Review)]

Hello Patrick Rudolph, Arthur Heymans, Paul Menzel, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/27590

to look at the new patch set (#9).

Change subject: nb/i945: Refactor sdram_rcomp_buffer_strength_and_slew for i945GC
......................................................................

nb/i945: Refactor sdram_rcomp_buffer_strength_and_slew for i945GC

Those vales are used by vendorbios.

945G-M4 board boots fine when DIMM0 is not populated.
Still not boot:
 - When channel0 is not populated at all. This is probably
   linked to "rcven.c". This file seems to be designed for
   only 2 DIMMS.
 - When 533MHz RAM is used. Probably clocking at 533MHz for
   i945GC is broken.

Could you check if this breaks some thing for i945 laptop version?

Change-Id: Iff1705788fdffeacd94fe5e50507733ff7c0f96b
Signed-off-by: Elyes HAOUAS 
---
M src/northbridge/intel/i945/raminit.c
1 file changed, 116 insertions(+), 18 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/27590/9