Francis Rowe (info@gluglug.org.uk) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11122
-gerrit
commit 1e2112041908366ef500b6b4df28ae147a9aeb11 Author: Francis Rowe info@gluglug.org.uk Date: Tue Aug 4 22:48:24 2015 +0100
northbridge/gm45/raminit.c: enable GS45 high-performance mode
The datasheets for GS45 describe a high- and low-performance mode for different CPUs. Coreboot currently disables GS45 altogether, but forcing coreboot to treat high-performance GS45 as GM45 makes the X200S and X200 Tablet boot if it has the right CPU type.
Hardcode-enable GS45 high-performance mode in coreboot, passing it off as GM45. This is known to work with all CPUs except the SU (low performance) models.
Change-Id: I6c5ab4d352c049ed907c7b727e9310f290fd3aa8 Signed-off-by: Francis Rowe info@gluglug.org.uk --- 3rdparty/blobs | 2 +- src/northbridge/intel/gm45/raminit.c | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/3rdparty/blobs b/3rdparty/blobs index 61d663e..34b0926 160000 --- a/3rdparty/blobs +++ b/3rdparty/blobs @@ -1 +1 @@ -Subproject commit 61d663e39bc96530900c3232ccea7365ab9dad0b +Subproject commit 34b09265063c19ea5d61bd5a2f057b47b5aa2232 diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c index 9c4fecd..9f5aa06 100644 --- a/src/northbridge/intel/gm45/raminit.c +++ b/src/northbridge/intel/gm45/raminit.c @@ -108,8 +108,8 @@ void get_gmch_info(sysinfo_t *sysinfo) printk(BIOS_SPEW, "GMCH: GS40\n"); break; case GMCH_GS45: - printk(BIOS_SPEW, "GMCH: GS45, using low power mode by default\n"); - sysinfo->gs45_low_power_mode = 1; + printk(BIOS_SPEW, "GMCH: GS45, using high performance mode by default\n"); + sysinfo->gs45_low_power_mode = 0; break; case GMCH_PM45: printk(BIOS_SPEW, "GMCH: PM45\n"); @@ -1692,7 +1692,7 @@ void raminit(sysinfo_t *const sysinfo, const int s3resume) { const dimminfo_t *const dimms = sysinfo->dimms; const timings_t *const timings = &sysinfo->selected_timings; - const int sff = sysinfo->gfx_type == GMCH_GS45; + const int sff = (sysinfo->gfx_type == GMCH_GS45) && (sysinfo->gs45_low_power_mode == 1);
int ch; u8 reg8;