Alok Agarwal has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86062?usp=email )
Change subject: vc/intel/fsp/twinlake: Update FSP headers to v5222.01 ......................................................................
vc/intel/fsp/twinlake: Update FSP headers to v5222.01
- Add Usb4CmMode & CnviWifiCore Upd support in FspsUpd.h - Update UPD Offset in FspsUpd.h
BUG=b:354612775 TEST=Able to build and boot google/Tivviks * vc/intel/fsp/twinlake: Update FSP headers to v5222.01
- Add EnableTcssCovTypeA and MappingPchXhciUsbA in FspsUpd.h - Update UPD Offset in FspsUpd.h
BUG=b:390225562 TEST=Able to build and boot google/Tivviks
Change-Id: Ibd1a289ddd9d434fabe3956e4edaf648f4403bf7 Signed-off-by: alokagarwal alok.agarwal@intel.corp-partner.google.com --- M src/vendorcode/intel/fsp/fsp2_0/twinlake/FspsUpd.h 1 file changed, 12 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/86062/1
diff --git a/src/vendorcode/intel/fsp/fsp2_0/twinlake/FspsUpd.h b/src/vendorcode/intel/fsp/fsp2_0/twinlake/FspsUpd.h index add6425..c218dc1 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/twinlake/FspsUpd.h +++ b/src/vendorcode/intel/fsp/fsp2_0/twinlake/FspsUpd.h @@ -3856,7 +3856,18 @@
/** Offset 0x0F96 - Reserved **/ - UINT8 Reserved53[16]; + UINT8 Reserved53[8]; + +/** Offset 0x0F9E - Type C Port x Convert to TypeA + Enable / Disable(default) Type C Port x Convert to TypeA + $EN_DIS +**/ + UINT8 EnableTcssCovTypeA[4]; + +/** Offset 0x0FA2 - PCH xhci port x for Type C Port x mapping + input PCH xhci port x for Type C Port 0 mapping. +**/ + UINT8 MappingPchXhciUsbA[4];
/** Offset 0x0FA6 - FOMS Control Policy Choose the Foms Control Policy, <b>Default = 0 </b>