Elyes Haouas has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86190?usp=email )
Change subject: tree: Use boolean for PchHdaDspEnable ......................................................................
tree: Use boolean for PchHdaDspEnable
Change-Id: I47852c9b023cc4839000019b8a932b6e471fa839 Signed-off-by: Elyes Haouas ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/86190 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Maxim Polyakov max.senia.poliak@gmail.com --- M src/mainboard/google/dedede/variants/baseboard/devicetree.cb M src/mainboard/google/hatch/variants/baseboard/devicetree.cb M src/mainboard/google/puff/variants/baseboard/devicetree.cb M src/mainboard/google/volteer/variants/baseboard/devicetree.cb M src/mainboard/intel/coffeelake_rvp/variants/baseboard/devicetree.cb M src/mainboard/intel/coffeelake_rvp/variants/cfl_h/overridetree.cb M src/mainboard/intel/coffeelake_rvp/variants/cfl_s/overridetree.cb M src/mainboard/intel/coffeelake_rvp/variants/cfl_u/overridetree.cb M src/mainboard/intel/coffeelake_rvp/variants/cml_u/overridetree.cb M src/mainboard/intel/coffeelake_rvp/variants/whl_u/overridetree.cb M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb M src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb M src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb M src/mainboard/prodrive/hermes/devicetree.cb M src/mainboard/purism/librem_jsl/devicetree.cb M src/mainboard/siemens/chili/variants/base/devicetree.cb M src/mainboard/siemens/chili/variants/chili/devicetree.cb M src/soc/intel/elkhartlake/chip.h M src/soc/intel/tigerlake/chip.h 19 files changed, 19 insertions(+), 19 deletions(-)
Approvals: Maxim Polyakov: Looks good to me, approved build bot (Jenkins): Verified
diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb index 2b55e7c..879f4d0 100644 --- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb @@ -129,7 +129,7 @@ register "PcieClkSrcClkReq[5]" = "5"
# Audio related configurations - register "PchHdaDspEnable" = "1" + register "PchHdaDspEnable" = "true" register "PchHdaAudioLinkHdaEnable" = "1" register "PchHdaAudioLinkSspEnable[0]" = "1" register "PchHdaAudioLinkSspEnable[1]" = "1" diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb index 6b3eff6..da1c45f 100644 --- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb @@ -177,7 +177,7 @@ register "PcieClkSrcClkReq[3]" = "3"
#Enable I2S Audio, SSP0, SSP1 and DMIC0, default DMIC1 N/A (by variants override) - register "PchHdaDspEnable" = "1" + register "PchHdaDspEnable" = "true" register "PchHdaAudioLinkSsp0" = "1" register "PchHdaAudioLinkSsp1" = "1" register "PchHdaAudioLinkDmic0" = "1" diff --git a/src/mainboard/google/puff/variants/baseboard/devicetree.cb b/src/mainboard/google/puff/variants/baseboard/devicetree.cb index de4631a..c5b0121 100644 --- a/src/mainboard/google/puff/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/puff/variants/baseboard/devicetree.cb @@ -177,7 +177,7 @@ register "PcieClkSrcClkReq[3]" = "3"
#Enable I2S Audio, SSP0, SSP1 and DMIC0, default DMIC1 N/A (by variants override) - register "PchHdaDspEnable" = "1" + register "PchHdaDspEnable" = "true" register "PchHdaAudioLinkSsp0" = "1" register "PchHdaAudioLinkSsp1" = "1" register "PchHdaAudioLinkDmic0" = "1" diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index 8110bb7..9c7b592 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -506,7 +506,7 @@ end end device ref hda on - register "PchHdaDspEnable" = "1" + register "PchHdaDspEnable" = "true"
chip drivers/sof register "spkr_tplg" = "max98373" diff --git a/src/mainboard/intel/coffeelake_rvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/baseboard/devicetree.cb index 012afc4..16c68cd 100644 --- a/src/mainboard/intel/coffeelake_rvp/variants/baseboard/devicetree.cb +++ b/src/mainboard/intel/coffeelake_rvp/variants/baseboard/devicetree.cb @@ -22,7 +22,7 @@ register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC0)" register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC0)"
- register "PchHdaDspEnable" = "1" + register "PchHdaDspEnable" = "true" register "PchHdaAudioLinkHda" = "1"
register "PcieClkSrcUsage[0]" = "1" diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/overridetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/overridetree.cb index 049859a..031974f 100644 --- a/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/overridetree.cb +++ b/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/overridetree.cb @@ -39,7 +39,7 @@ register "SataPortsEnable[6]" = "1" register "SataPortsEnable[7]" = "1"
- register "PchHdaDspEnable" = "0" + register "PchHdaDspEnable" = "false" register "PchHdaAudioLinkHda" = "1"
register "PcieRpEnable[0]" = "true" diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/overridetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/overridetree.cb index 266c698..3f1820e 100644 --- a/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/overridetree.cb +++ b/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/overridetree.cb @@ -37,7 +37,7 @@ register "SataPortsEnable[6]" = "1" register "SataPortsEnable[7]" = "1"
- register "PchHdaDspEnable" = "0" + register "PchHdaDspEnable" = "false" register "PchHdaAudioLinkHda" = "1"
register "PcieRpEnable[0]" = "true" diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cfl_u/overridetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/cfl_u/overridetree.cb index 0133a11..84ebda5 100644 --- a/src/mainboard/intel/coffeelake_rvp/variants/cfl_u/overridetree.cb +++ b/src/mainboard/intel/coffeelake_rvp/variants/cfl_u/overridetree.cb @@ -1,6 +1,6 @@ chip soc/intel/cannonlake
- register "PchHdaDspEnable" = "1" + register "PchHdaDspEnable" = "true" register "PchHdaAudioLinkHda" = "1"
register "PcieRpEnable[0]" = "true" diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cml_u/overridetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/cml_u/overridetree.cb index 157a465..846fea9 100644 --- a/src/mainboard/intel/coffeelake_rvp/variants/cml_u/overridetree.cb +++ b/src/mainboard/intel/coffeelake_rvp/variants/cml_u/overridetree.cb @@ -38,7 +38,7 @@ register "SataPortsEnable[6]" = "1" register "SataPortsEnable[7]" = "1"
- register "PchHdaDspEnable" = "1" + register "PchHdaDspEnable" = "true" register "PchHdaAudioLinkHda" = "1"
register "PcieRpEnable[0]" = "true" diff --git a/src/mainboard/intel/coffeelake_rvp/variants/whl_u/overridetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/whl_u/overridetree.cb index 8df9851..89e59a4 100644 --- a/src/mainboard/intel/coffeelake_rvp/variants/whl_u/overridetree.cb +++ b/src/mainboard/intel/coffeelake_rvp/variants/whl_u/overridetree.cb @@ -23,7 +23,7 @@ register "SataPortsEnable[6]" = "1" register "SataPortsEnable[7]" = "1"
- register "PchHdaDspEnable" = "1" + register "PchHdaDspEnable" = "true" register "PchHdaAudioLinkHda" = "1"
register "PcieRpEnable[0]" = "true" diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb index 56c7bd6..b4a9261 100644 --- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb +++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb @@ -56,7 +56,7 @@ # Skip the CPU replacement check register "SkipCpuReplacementCheck" = "1"
- register "PchHdaDspEnable" = "1" + register "PchHdaDspEnable" = "true" register "PchHdaAudioLinkHdaEnable" = "0" register "PchHdaAudioLinkSspEnable[0]" = "1" register "PchHdaAudioLinkSspEnable[1]" = "1" diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb index b9af2c5..032e80e 100644 --- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb +++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb @@ -322,7 +322,7 @@ end end device ref hda on - register "PchHdaDspEnable" = "1" + register "PchHdaDspEnable" = "true" register "PchHdaAudioLinkDmicEnable" = "{ [0] = 1, [1] = 1, diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb index 7e00917..720e40f 100644 --- a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb +++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb @@ -325,7 +325,7 @@ end end device ref hda on - register "PchHdaDspEnable" = "1" + register "PchHdaDspEnable" = "true" register "PchHdaAudioLinkDmicEnable" = "{ [0] = 1, [1] = 1, diff --git a/src/mainboard/prodrive/hermes/devicetree.cb b/src/mainboard/prodrive/hermes/devicetree.cb index cb5f211..e9bd24a 100644 --- a/src/mainboard/prodrive/hermes/devicetree.cb +++ b/src/mainboard/prodrive/hermes/devicetree.cb @@ -23,7 +23,7 @@ register "SataPortsHotPlug[6]" = "1" register "SataPortsHotPlug[7]" = "1"
- register "PchHdaDspEnable" = "0" + register "PchHdaDspEnable" = "false" register "PchHdaAudioLinkHda" = "1"
register "PcieClkSrcUsage[0]" = "20" # PCIe Slot1 diff --git a/src/mainboard/purism/librem_jsl/devicetree.cb b/src/mainboard/purism/librem_jsl/devicetree.cb index c00404d..82cac12 100644 --- a/src/mainboard/purism/librem_jsl/devicetree.cb +++ b/src/mainboard/purism/librem_jsl/devicetree.cb @@ -39,7 +39,7 @@ register "SerialIoUartMode[2]" = "PchSerialIoSkipInit"
# Audio related configurations - register "PchHdaDspEnable" = "1" + register "PchHdaDspEnable" = "true" register "PchHdaAudioLinkHdaEnable" = "1"
device domain 0 on diff --git a/src/mainboard/siemens/chili/variants/base/devicetree.cb b/src/mainboard/siemens/chili/variants/base/devicetree.cb index 851a8bf..f217461 100644 --- a/src/mainboard/siemens/chili/variants/base/devicetree.cb +++ b/src/mainboard/siemens/chili/variants/base/devicetree.cb @@ -4,7 +4,7 @@ # FSP configuration register "RMT" = "0"
- register "PchHdaDspEnable" = "0" + register "PchHdaDspEnable" = "false" register "PchHdaAudioLinkHda" = "1"
device domain 0 on diff --git a/src/mainboard/siemens/chili/variants/chili/devicetree.cb b/src/mainboard/siemens/chili/variants/chili/devicetree.cb index c5121f9a..38358d8 100644 --- a/src/mainboard/siemens/chili/variants/chili/devicetree.cb +++ b/src/mainboard/siemens/chili/variants/chili/devicetree.cb @@ -4,7 +4,7 @@ # FSP configuration register "RMT" = "0"
- register "PchHdaDspEnable" = "0" + register "PchHdaDspEnable" = "false" register "PchHdaAudioLinkHda" = "1"
device domain 0 on diff --git a/src/soc/intel/elkhartlake/chip.h b/src/soc/intel/elkhartlake/chip.h index 397372d..d4bb04f 100644 --- a/src/soc/intel/elkhartlake/chip.h +++ b/src/soc/intel/elkhartlake/chip.h @@ -203,7 +203,7 @@ uint16_t SataPortsDitoVal[CONFIG_MAX_SATA_PORTS];
/* Audio related */ - uint8_t PchHdaDspEnable; + bool PchHdaDspEnable; uint8_t PchHdaAudioLinkHdaEnable; uint8_t PchHdaSdiEnable[MAX_HD_AUDIO_SDI_LINKS]; uint8_t PchHdaAudioLinkDmicEnable[MAX_HD_AUDIO_DMIC_LINKS]; diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h index 41c7dd3c..2c0a9b4 100644 --- a/src/soc/intel/tigerlake/chip.h +++ b/src/soc/intel/tigerlake/chip.h @@ -249,7 +249,7 @@ uint16_t SataPortsDitoVal[8];
/* Audio related */ - uint8_t PchHdaDspEnable; + bool PchHdaDspEnable; uint8_t PchHdaAudioLinkHdaEnable; uint8_t PchHdaAudioLinkDmicEnable[MAX_HD_AUDIO_DMIC_LINKS]; uint8_t PchHdaAudioLinkSspEnable[MAX_HD_AUDIO_SSP_LINKS];
-
Elyes Haouas (Code Review)