Change in coreboot[master]: mb/google/guybrush: Configure EN_SPKR GPIO in PSP verstage

[Karthik Ramasubramanian (Code Review)]

Attention is currently required from: Jon Murphy, Rob Barnes, Karthik Ramasubramanian.
Hello build bot (Jenkins), Raul Rangel, Paul Menzel, Jon Murphy, Rob Barnes,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/59813

to look at the new patch set (#2).

Change subject: mb/google/guybrush: Configure EN_SPKR GPIO in PSP verstage
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mb/google/guybrush: Configure EN_SPKR GPIO in PSP verstage

EN_SPKR GPIO is used as a multiplexer select signal between RAM_ID
straps and Developer Mode Beep signals. During boot up it is LOW and
selects RAM_ID straps. When the system enters OS, it is driven HIGH and
selects DEV BEEP signals. Since in some boards, the GPIO chosen is in S5
domain it does not reset until the system enters mechanical off (G3)
state. On scenarios where the power button is pressed when the system is
in S5, incorrect RAM_ID strap is being read because the EN_SPKR is still
selecting DEV BEEP signal. This causes boot up failures. Fix this by
configuring the EN_SPKR GPIO (in S5 domain) explicitly in PSP verstage.

BUG=b:204450368
TEST=Build and boot to OS in Guybrush. Perform suspend-resume cycle
followed by a S5 -> S0 boot cycle for 2 iterations successfully.

Signed-off-by: Karthikeyan Ramasubramanian 
Change-Id: I9a52a167da9c7040731da5d355ec345fd9b13762
---
M src/mainboard/google/guybrush/variants/guybrush/gpio.c
M src/mainboard/google/guybrush/variants/nipperkin/gpio.c
2 files changed, 4 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/59813/2