Change in coreboot[master]: soc/intel/alderlake: Enable Irms UPD for ADL

[Ronak Kanabar (Code Review)]

Attention is currently required from: V Sowmya, Maulik V Vaghela, Paul Menzel, Tim Wawrzynczak, Subrata Banik, Sridhar Siricilla, Vinay Kumar, Balaji Manigandan, Kane Chen, Srinidhi N Kaushik, Patrick Rudolph.
Ronak Kanabar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56330 )

Change subject: soc/intel/alderlake: Enable Irms UPD for ADL
......................................................................

Patch Set 12:

(3 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/56330/comment/a960d603_c59a2792 
PS10, Line 9: will set
> Present tense: sets

Done

https://review.coreboot.org/c/coreboot/+/56330/comment/77c69797_9796f65c 
PS10, Line 9: This change will set Irms config in FSP.
            : It will result VR TDC Input current to be
            : treated as it is root mean square.
> Please re-flow for 75 characters per line.

Done

File src/soc/intel/alderlake/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/56330/comment/790de896_ac4a8e06 
PS10, Line 617: 0x01
> Why not just 1?

Done