Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56026 )
Change subject: soc/intel/alderlake: Add GFx Device ID 0x46a6 ......................................................................
soc/intel/alderlake: Add GFx Device ID 0x46a6
This CL adds support for new ADL graphics Device ID 0x46a6.
TEST=Build and boot Adlrvp board
Change-Id: I8ca875c7faf2997d207aff9e292f94a3b6311e94 Signed-off-by: Maulik V Vaghela maulik.v.vaghela@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/56026 Reviewed-by: Meera Ravindranath meera.ravindranath@intel.com Reviewed-by: Furquan Shaikh furquan@google.com Reviewed-by: Subrata Banik subrata.banik@intel.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/include/device/pci_ids.h M src/soc/intel/alderlake/bootblock/report_platform.c M src/soc/intel/common/block/graphics/graphics.c 3 files changed, 3 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Subrata Banik: Looks good to me, approved Meera Ravindranath: Looks good to me, but someone else must approve
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 541d38e..f3f16fb 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3818,6 +3818,7 @@ #define PCI_DEVICE_ID_INTEL_ADL_P_GT2_3 0x46a3 #define PCI_DEVICE_ID_INTEL_ADL_P_GT2_4 0x46a8 #define PCI_DEVICE_ID_INTEL_ADL_P_GT2_5 0x46b3 +#define PCI_DEVICE_ID_INTEL_ADL_P_GT2_6 0x46a6 #define PCI_DEVICE_ID_INTEL_ADL_S_GT1 0x4680 #define PCI_DEVICE_ID_INTEL_ADL_M_GT1 0x46c0
diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c index 5ddc322..d811123 100644 --- a/src/soc/intel/alderlake/bootblock/report_platform.c +++ b/src/soc/intel/alderlake/bootblock/report_platform.c @@ -105,6 +105,7 @@ { PCI_DEVICE_ID_INTEL_ADL_P_GT2_3, "Alderlake P GT2" }, { PCI_DEVICE_ID_INTEL_ADL_P_GT2_4, "Alderlake P GT2" }, { PCI_DEVICE_ID_INTEL_ADL_P_GT2_5, "Alderlake P GT2" }, + { PCI_DEVICE_ID_INTEL_ADL_P_GT2_6, "Alderlake P GT2" }, { PCI_DEVICE_ID_INTEL_ADL_M_GT1, "Alderlake M GT1" }, };
diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c index 61d39bd..b99d2a8 100644 --- a/src/soc/intel/common/block/graphics/graphics.c +++ b/src/soc/intel/common/block/graphics/graphics.c @@ -301,6 +301,7 @@ PCI_DEVICE_ID_INTEL_ADL_P_GT2_3, PCI_DEVICE_ID_INTEL_ADL_P_GT2_4, PCI_DEVICE_ID_INTEL_ADL_P_GT2_5, + PCI_DEVICE_ID_INTEL_ADL_P_GT2_6, PCI_DEVICE_ID_INTEL_ADL_S_GT1, PCI_DEVICE_ID_INTEL_ADL_M_GT1, 0,
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Patrick Georgi (Code Review)