Change in coreboot[master]: drivers/genesyslogic/gl9755: Disable ASPM L0s support - coreboot-gerrit

14 Sep 2021


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Ben Chuang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57632 )
Change subject: drivers/genesyslogic/gl9755: Disable ASPM L0s support
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Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/57632/comment/46c2a98b_ce8a323b 
PS1, Line 12: TEST=build and check ASPM state
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How exactly, and with what device?
The device is GL9755. It is a PCIe to SD card reader. When L0s and L1 are enabled, we measure CLKREQ# is always low, it means the device doesn't enter L1 sub-state. Therefore, we disable L0s so that it can enter L1 sub-state.
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: If121b5cb534eb32bac8992683c3f0eee8946acec
Gerrit-Change-Number: 57632
Gerrit-PatchSet: 1
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Gerrit-CC: Greg Tu greg.tu@genesyslogic.com.tw
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