Change in coreboot[master]: soc/intel/common/block/pcie/rtd3: Add ModPHY power gate support for RTD3 - coreboot-gerrit

7 Dec 2021


      Attention is currently required from: Tim Wawrzynczak, Patrick Rudolph.
Cliff Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59855 )
Change subject: soc/intel/common/block/pcie/rtd3: Add ModPHY power gate support for RTD3
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Patch Set 2:
(1 comment)
File src/soc/intel/common/block/pcie/rtd3/rtd3.c:
https://review.coreboot.org/c/coreboot/+/59855/comment/24e5aaf1_e1d6eb35 
PS2, Line 39: #define PCH_PCIE_CFG_LCAP_PN 0x4f /* Root Port Number */
Can we take this chance to clarify LCAP address? It should be 0x4C according to PCH EDS vol2 spec.
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I19cb05a74acfa3ded7867b1cac32c161a83b4f7d
Gerrit-Change-Number: 59855
Gerrit-PatchSet: 2
Gerrit-Owner: Tim Wawrzynczak twawrzynczak@chromium.org
Gerrit-Reviewer: Cliff Huang cliff.huang@intel.com
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