[XS] Change in coreboot[main]: soc/intel/meteorlake: Reserve IOE P2SB MMIO correctly

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/78252?usp=email )

(

3 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
 )Change subject: soc/intel/meteorlake: Reserve IOE P2SB MMIO correctly
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soc/intel/meteorlake: Reserve IOE P2SB MMIO correctly

The original code only reserves IOM mmio, but there is other asl
code that requires to program ioe p2sb mmio such as IOE PCIE clk request
control. See _SB.ECLK.CLKD in src/soc/intel/common/acpi/pcie_clk.asl

TEST=as before: suspend_stress_test 50 cycle pass, type-c display OK
on screebo

Change-Id: Ie55f7975277b390f776e44596c42e426ba9cd235
Signed-off-by: Kane Chen 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78252
Reviewed-by: Subrata Banik 
Tested-by: build bot (Jenkins) 
Reviewed-by: Eric Lai 
---
M src/soc/intel/meteorlake/p2sb.c
1 file changed, 2 insertions(+), 2 deletions(-)

Approvals:
  Eric Lai: Looks good to me, approved
  Subrata Banik: Looks good to me, approved
  build bot (Jenkins): Verified

diff --git a/src/soc/intel/meteorlake/p2sb.c b/src/soc/intel/meteorlake/p2sb.c
index ae9b9a4..5863cf0 100644
--- a/src/soc/intel/meteorlake/p2sb.c
+++ b/src/soc/intel/meteorlake/p2sb.c
@@ -34,8 +34,8 @@

static void ioe_p2sb_read_resources(struct device *dev)
 {
-	/* Add the fixed MMIO resource for IOM */
-	mmio_range(dev, PCI_BASE_ADDRESS_0, IOM_BASE_ADDR, IOM_BASE_SIZE);
+	/* Add the fixed MMIO resource for IOE P2SB */
+	mmio_range(dev, PCI_BASE_ADDRESS_0, IOE_P2SB_BAR, IOE_P2SB_SIZE);
 }

static void p2sb_read_resources(struct device *dev)