Change in ...coreboot[master]: SMBIOS: Update BIOS Information (Type 0) to version V3.2.0

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31416

Change subject: SMBIOS: Update BIOS Information (Type 0) to version V3.2.0
......................................................................

SMBIOS: Update BIOS Information (Type 0) to version V3.2.0

Add Extended BIOS ROM Size filed
Also fix some coding style

Change-Id: Iec35c8c66210f0ddc07a2ca6f976a1f8fc53037d
Signed-off-by: Elyes HAOUAS 
---
M src/arch/x86/smbios.c
M src/include/smbios.h
2 files changed, 22 insertions(+), 11 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/31416/1

diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c
index c0545ce..7cba441 100644
--- a/src/arch/x86/smbios.c
+++ b/src/arch/x86/smbios.c
@@ -376,6 +376,16 @@
     * once the SMBIOS specification addresses ROM sizes > 16 MiB.
     */
    uint32_t rom_size = CONFIG_ROM_SIZE;
+
+	if (rom_size - GiB >= 0)
+		t->extended_bios_rom_size = (rom_size / GiB) | (1 << 14);
+	else
+		t->extended_bios_rom_size = (rom_size / MiB);
+
+	/* As a work around to prevent a compiler error, temporarily specify
+	 * 16 MiB flash sizes when ROM size >= 16 MiB.  An update is necessary
+	 * once the SMBIOS specification addresses ROM sizes > 16 MiB.
+	 */
    rom_size = MIN(CONFIG_ROM_SIZE, 16 * MiB);
    t->bios_rom_size = (rom_size / 65535) - 1;

diff --git a/src/include/smbios.h b/src/include/smbios.h
index 14badbc..23975c5 100644
--- a/src/include/smbios.h
+++ b/src/include/smbios.h
@@ -52,18 +52,18 @@
 const char *smbios_mainboard_family(void);
 #endif

-#define BIOS_CHARACTERISTICS_PCI_SUPPORTED  (1 << 7)
-#define BIOS_CHARACTERISTICS_PC_CARD  (1 << 8)
-#define BIOS_CHARACTERISTICS_PNP  (1 << 9)
-#define BIOS_CHARACTERISTICS_APM (1 << 10)
-#define BIOS_CHARACTERISTICS_UPGRADEABLE      (1 << 11)
-#define BIOS_CHARACTERISTICS_SHADOW           (1 << 12)
-#define BIOS_CHARACTERISTICS_BOOT_FROM_CD     (1 << 15)
-#define BIOS_CHARACTERISTICS_SELECTABLE_BOOT  (1 << 16)
-#define BIOS_CHARACTERISTICS_BIOS_SOCKETED    (1 << 17)
+#define BIOS_CHARACTERISTICS_PCI_SUPPORTED	(1 << 7)
+#define BIOS_CHARACTERISTICS_PC_CARD		(1 << 8)
+#define BIOS_CHARACTERISTICS_PNP		(1 << 9)
+#define BIOS_CHARACTERISTICS_APM		(1 << 10)
+#define BIOS_CHARACTERISTICS_UPGRADEABLE	(1 << 11)
+#define BIOS_CHARACTERISTICS_SHADOW		(1 << 12)
+#define BIOS_CHARACTERISTICS_BOOT_FROM_CD	(1 << 15)
+#define BIOS_CHARACTERISTICS_SELECTABLE_BOOT	(1 << 16)
+#define BIOS_CHARACTERISTICS_BIOS_SOCKETED	(1 << 17)

-#define BIOS_EXT1_CHARACTERISTICS_ACPI    (1 << 0)
-#define BIOS_EXT2_CHARACTERISTICS_TARGET  (1 << 2)
+#define BIOS_EXT1_CHARACTERISTICS_ACPI		(1 << 0)
+#define BIOS_EXT2_CHARACTERISTICS_TARGET	(1 << 2)

#define BIOS_MEMORY_ECC_SINGLE_BIT_CORRECTING	(1 << 3)
 #define BIOS_MEMORY_ECC_DOUBLE_BIT_CORRECTING	(1 << 4)
@@ -235,6 +235,7 @@
    u8 system_bios_minor_release;
    u8 ec_major_release;
    u8 ec_minor_release;
+	u16 extended_bios_rom_size;
    u8 eos[2];
 } __packed;

[Paul Menzel (Code Review)]

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31416 )

Change subject: SMBIOS: Update BIOS Information (Type 0) to version V3.2.0
......................................................................

Patch Set 1:

(3 comments)

https://review.coreboot.org/#/c/31416/1//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/#/c/31416/1//COMMIT_MSG@9 
PS1, Line 9: filed
field

https://review.coreboot.org/#/c/31416/1//COMMIT_MSG@10 
PS1, Line 10: Also fix some coding style
Format that as a list/enumeration?

https://review.coreboot.org/#/c/31416/1/src/arch/x86/smbios.c 
File src/arch/x86/smbios.c:

https://review.coreboot.org/#/c/31416/1/src/arch/x86/smbios.c@385 
PS1, Line 385: /* As a work around to prevent a compiler error, temporarily specify
             : 	 * 16 MiB flash sizes when ROM size >= 16 MiB.  An update is necessary
             : 	 * once the SMBIOS specification addresses ROM sizes > 16 MiB.
             : 	 */
Why duplicate the comment?

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31416 )

Change subject: SMBIOS: Update BIOS Information (Type 0) to version V3.2.0
......................................................................

Patch Set 1:

(1 comment)

https://review.coreboot.org/#/c/31416/1/src/arch/x86/smbios.c 
File src/arch/x86/smbios.c:

https://review.coreboot.org/#/c/31416/1/src/arch/x86/smbios.c@385 
PS1, Line 385: /* As a work around to prevent a compiler error, temporarily specify
             : 	 * 16 MiB flash sizes when ROM size >= 16 MiB.  An update is necessary
             : 	 * once the SMBIOS specification addresses ROM sizes > 16 MiB.
             : 	 */
> Why duplicate the comment?

oops :)
thank you so mush

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31416 )

Change subject: SMBIOS: Update BIOS Information (Type 0) to version V3.2.0
......................................................................

Patch Set 1:

(1 comment)

https://review.coreboot.org/#/c/31416/1//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/#/c/31416/1//COMMIT_MSG@10 
PS1, Line 10: Also fix some coding style
> Format that as a list/enumeration?

yes

[HAOUAS Elyes (Code Review)]

Hello Richard Spiegel, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/31416

to look at the new patch set (#2).

Change subject: SMBIOS: Update BIOS Information (Type 0) to version V3.2.0
......................................................................

SMBIOS: Update BIOS Information (Type 0) to version V3.2.0

Add Extended BIOS ROM Size field
Also fix some coding style

Change-Id: Iec35c8c66210f0ddc07a2ca6f976a1f8fc53037d
Signed-off-by: Elyes HAOUAS 
---
M src/arch/x86/smbios.c
M src/include/smbios.h
2 files changed, 19 insertions(+), 12 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/31416/2

[Nico Huber (Code Review)]

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31416 )

Change subject: SMBIOS: Update BIOS Information (Type 0) to version V3.2.0
......................................................................

Patch Set 2:

(4 comments)

Thanks for the update!

https://review.coreboot.org/#/c/31416/2//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/#/c/31416/2//COMMIT_MSG@10 
PS2, Line 10: Also fix some coding style
This seems completely unrelated, please split out.

https://review.coreboot.org/#/c/31416/2/src/arch/x86/smbios.c 
File src/arch/x86/smbios.c:

https://review.coreboot.org/#/c/31416/2/src/arch/x86/smbios.c@376 
PS2, Line 376: 	if (rom_size - GiB >= 0)
This would be easier to read as

if (rom_size >= GiB)

Also, the actual maximum number is 2^14-1, so this would be
more accurate:

if (rom_size >= (1ull << 14) * MiB)

Then again, this makes it obvious that we don't need the `if`
for a 32-bit number ;) (a smart compiler would warn that it's
always false).

https://review.coreboot.org/#/c/31416/2/src/arch/x86/smbios.c@379 
PS2, Line 379: rom_size / MiB
The spec wants us to round up.

https://review.coreboot.org/#/c/31416/2/src/arch/x86/smbios.c@384 
PS2, Line 384: 	 */
Comment needs update. The spec *does* address it now :)

[Richard Spiegel (Code Review)]

Richard Spiegel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31416 )

Change subject: SMBIOS: Update BIOS Information (Type 0) to version V3.2.0
......................................................................

Patch Set 2:

(3 comments)

https://review.coreboot.org/#/c/31416/2//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/#/c/31416/2//COMMIT_MSG@10 
PS2, Line 10: Also fix some coding style
> This seems completely unrelated, please split out.

Agree

https://review.coreboot.org/#/c/31416/2/src/include/smbios.h 
File src/include/smbios.h:

https://review.coreboot.org/#/c/31416/2/src/include/smbios.h@55 
PS2, Line 55: #define BIOS_CHARACTERISTICS_PCI_SUPPORTED	(1 << 7)
            : #define BIOS_CHARACTERISTICS_PC_CARD		(1 << 8)
            : #define BIOS_CHARACTERISTICS_PNP		(1 << 9)
            : #define BIOS_CHARACTERISTICS_APM		(1 << 10)
            : #define BIOS_CHARACTERISTICS_UPGRADEABLE	(1 << 11)
            : #define BIOS_CHARACTERISTICS_SHADOW		(1 << 12)
            : #define BIOS_CHARACTERISTICS_BOOT_FROM_CD	(1 << 15)
            : #define BIOS_CHARACTERISTICS_SELECTABLE_BOOT	(1 << 16)
            : #define BIOS_CHARACTERISTICS_BIOS_SOCKETED	(1 << 17)
            : 
            : #define BIOS_EXT1_CHARACTERISTICS_ACPI		(1 << 0)
            : #define BIOS_EXT2_CHARACTERISTICS_TARGET	(1 << 2)
            : 
This does not belong to updating SMBIOS, should be on a separate patch. You might look for other files (usually header files) needing alignment... though I would not call it fixing code style. Just say "align values for readability".

https://review.coreboot.org/#/c/31416/2/src/include/smbios.h@238 
PS2, Line 238: 	u16 extended_bios_rom_size;
While this does belong to SMBIOS update.

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31416 )

Change subject: SMBIOS: Update BIOS Information (Type 0) to version V3.2.0
......................................................................

Patch Set 2:

(2 comments)

https://review.coreboot.org/#/c/31416/2//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/#/c/31416/2//COMMIT_MSG@10 
PS2, Line 10: Also fix some coding style
> Agree

right, I 'll split out

https://review.coreboot.org/#/c/31416/2/src/arch/x86/smbios.c 
File src/arch/x86/smbios.c:

https://review.coreboot.org/#/c/31416/2/src/arch/x86/smbios.c@388 
PS2, Line 388: 4
this should be 3

[HAOUAS Elyes (Code Review)]

Hello Richard Spiegel, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/31416

to look at the new patch set (#3).

Change subject: SMBIOS: Update BIOS Information (Type 0) to version V3.2.0
......................................................................

SMBIOS: Update BIOS Information (Type 0) to version V3.2.0

Add Extended BIOS ROM Size field.

Change-Id: Iec35c8c66210f0ddc07a2ca6f976a1f8fc53037d
Signed-off-by: Elyes HAOUAS 
---
M src/arch/x86/smbios.c
M src/include/smbios.h
2 files changed, 11 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/31416/3

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31416 )

Change subject: SMBIOS: Update BIOS Information (Type 0) to version V3.2.0
......................................................................

Patch Set 3:

(3 comments)

https://review.coreboot.org/#/c/31416/3/src/arch/x86/smbios.c 
File src/arch/x86/smbios.c:

https://review.coreboot.org/#/c/31416/3/src/arch/x86/smbios.c@378 
PS3, Line 378: 	if (CONFIG_ROM_SIZE >= GiB) {
Comparisons should place the constant on the right side of the test

https://review.coreboot.org/#/c/31416/3/src/arch/x86/smbios.c@381 
PS3, Line 381: 	} else {
space required after that close brace '}'

https://review.coreboot.org/#/c/31416/3/src/arch/x86/smbios.c@381 
PS3, Line 381: 	} else {
braces {} are not necessary for single statement blocks

[HAOUAS Elyes (Code Review)]

Hello Richard Spiegel, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/31416

to look at the new patch set (#4).

Change subject: SMBIOS: Update BIOS Information (Type 0) to version V3.2.0
......................................................................

SMBIOS: Update BIOS Information (Type 0) to version V3.2.0

Add Extended BIOS ROM Size field.

Change-Id: Iec35c8c66210f0ddc07a2ca6f976a1f8fc53037d
Signed-off-by: Elyes HAOUAS 
---
M src/arch/x86/smbios.c
M src/include/smbios.h
2 files changed, 11 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/31416/4

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31416 )

Change subject: SMBIOS: Update BIOS Information (Type 0) to version V3.2.0
......................................................................

Patch Set 4:

(1 comment)

https://review.coreboot.org/#/c/31416/4/src/arch/x86/smbios.c 
File src/arch/x86/smbios.c:

https://review.coreboot.org/#/c/31416/4/src/arch/x86/smbios.c@378 
PS4, Line 378: 	if (CONFIG_ROM_SIZE >= GiB) {
Comparisons should place the constant on the right side of the test

[Richard Spiegel (Code Review)]

Richard Spiegel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31416 )

Change subject: SMBIOS: Update BIOS Information (Type 0) to version V3.2.0
......................................................................

Patch Set 4: Code-Review+2

[HAOUAS Elyes (Code Review)]

Hello Richard Spiegel, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/31416

to look at the new patch set (#5).

Change subject: SMBIOS: Update BIOS Information (Type 0) to version V3.2.0
......................................................................

SMBIOS: Update BIOS Information (Type 0) to version V3.2.0

Add Extended BIOS ROM Size field.

Change-Id: Iec35c8c66210f0ddc07a2ca6f976a1f8fc53037d
Signed-off-by: Elyes HAOUAS 
---
M src/arch/x86/smbios.c
M src/include/smbios.h
2 files changed, 11 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/31416/5

[HAOUAS Elyes (Code Review)]

Hello Richard Spiegel, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/31416

to look at the new patch set (#6).

Change subject: SMBIOS: Update BIOS Information (Type 0) to version V3.2.0
......................................................................

SMBIOS: Update BIOS Information (Type 0) to version V3.2.0

Add Extended BIOS ROM Size field.

Change-Id: Iec35c8c66210f0ddc07a2ca6f976a1f8fc53037d
Signed-off-by: Elyes HAOUAS 
---
M src/arch/x86/smbios.c
M src/include/smbios.h
2 files changed, 11 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/31416/6

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31416 )

Change subject: SMBIOS: Update BIOS Information (Type 0) to version V3.2.0
......................................................................

Patch Set 6:

(1 comment)

https://review.coreboot.org/#/c/31416/6/src/arch/x86/smbios.c 
File src/arch/x86/smbios.c:

https://review.coreboot.org/#/c/31416/6/src/arch/x86/smbios.c@378 
PS6, Line 378: 	if (CONFIG_ROM_SIZE >= GiB) {
Comparisons should place the constant on the right side of the test

[Nico Huber (Code Review)]

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31416 )

Change subject: SMBIOS: Update BIOS Information (Type 0) to version V3.2.0
......................................................................

Patch Set 6: Code-Review+2

(2 comments)

Left some ideas for cosmetic cleanup, not in the scope of this change.

https://review.coreboot.org/#/c/31416/6/src/arch/x86/smbios.c 
File src/arch/x86/smbios.c:

https://review.coreboot.org/#/c/31416/6/src/arch/x86/smbios.c@374 
PS6, Line 374: 	uint32_t rom_size = CONFIG_ROM_SIZE;
The initialization is futile, could be dropped.

https://review.coreboot.org/#/c/31416/6/src/arch/x86/smbios.c@376 
PS6, Line 376: 	t->bios_rom_size = (rom_size / 65535) - 1;
lol, this shold be `65536`, easier: `(64 * KiB)`.

[Patrick Rudolph (Code Review)]

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31416 )

Change subject: SMBIOS: Update BIOS Information (Type 0) to version V3.2.0
......................................................................

Patch Set 6:

(1 comment)

https://review.coreboot.org/#/c/31416/6/src/arch/x86/smbios.c 
File src/arch/x86/smbios.c:

https://review.coreboot.org/#/c/31416/6/src/arch/x86/smbios.c@385 
PS6, Line 385: =
Unrelated. That's the BIOS version, not the SMBIOS version.

[HAOUAS Elyes (Code Review)]

Hello Richard Spiegel, build bot (Jenkins), Nico Huber,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/31416

to look at the new patch set (#7).

Change subject: SMBIOS: Update BIOS Information (Type 0) to version V3.2.0
......................................................................

SMBIOS: Update BIOS Information (Type 0) to version V3.2.0

Add Extended BIOS ROM Size field.

Change-Id: Iec35c8c66210f0ddc07a2ca6f976a1f8fc53037d
Signed-off-by: Elyes HAOUAS 
---
M src/arch/x86/smbios.c
M src/include/smbios.h
2 files changed, 10 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/31416/7

[Nico Huber (Code Review)]

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31416 )

Change subject: SMBIOS: Update BIOS Information (Type 0) to version V3.2.0
......................................................................

Patch Set 7:

(2 comments)

https://review.coreboot.org/#/c/31416/6/src/arch/x86/smbios.c 
File src/arch/x86/smbios.c:

https://review.coreboot.org/#/c/31416/6/src/arch/x86/smbios.c@385 
PS6, Line 385: =
> Unrelated. That's the BIOS version, not the SMBIOS version.

ouch, should have looked at the lhs, too ._.

https://review.coreboot.org/#/c/31416/7/src/arch/x86/smbios.c 
File src/arch/x86/smbios.c:

https://review.coreboot.org/#/c/31416/7/src/arch/x86/smbios.c@386 
PS7, Line 386: 	t->system_bios_minor_release = 0;
Unrelated, and we are at 9 now.

[HAOUAS Elyes (Code Review)]

Hello Richard Spiegel, build bot (Jenkins), Nico Huber,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/31416

to look at the new patch set (#8).

Change subject: SMBIOS: Update BIOS Information (Type 0) to version V3.2.0
......................................................................

SMBIOS: Update BIOS Information (Type 0) to version V3.2.0

Add Extended BIOS ROM Size field.
Also fix bios release value.

Change-Id: Iec35c8c66210f0ddc07a2ca6f976a1f8fc53037d
Signed-off-by: Elyes HAOUAS 
---
M src/arch/x86/smbios.c
M src/include/smbios.h
2 files changed, 10 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/31416/8

[Nico Huber (Code Review)]

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31416 )

Change subject: SMBIOS: Update BIOS Information (Type 0) to version V3.2.0
......................................................................

Patch Set 8:

(2 comments)

https://review.coreboot.org/#/c/31416/8//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/#/c/31416/8//COMMIT_MSG@10 
PS8, Line 10: Also fix bios release value.
what I said in this line in patch set 2.

https://review.coreboot.org/#/c/31416/8/src/arch/x86/smbios.c 
File src/arch/x86/smbios.c:

https://review.coreboot.org/#/c/31416/8/src/arch/x86/smbios.c@386 
PS8, Line 386: 	t->system_bios_minor_release = 9;
I don't think it would be a good practice to hard-code it
here. I guess a common header file where we'd have to change
the version in a single place would do. Deriving it from the
`git describe` string would be nice.

[HAOUAS Elyes (Code Review)]

Hello Richard Spiegel, build bot (Jenkins), Nico Huber,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/31416

to look at the new patch set (#9).

Change subject: SMBIOS: Update BIOS Information (Type 0) to version V3.2.0
......................................................................

SMBIOS: Update BIOS Information (Type 0) to version V3.2.0

Add Extended BIOS ROM Size field.

Change-Id: Iec35c8c66210f0ddc07a2ca6f976a1f8fc53037d
Signed-off-by: Elyes HAOUAS 
---
M src/arch/x86/smbios.c
M src/include/smbios.h
2 files changed, 8 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/31416/9

[Nico Huber (Code Review)]

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31416 )

Change subject: SMBIOS: Update BIOS Information (Type 0) to version V3.2.0
......................................................................

Patch Set 9: Code-Review+2

[Nico Huber (Code Review)]

Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31416 )

Change subject: SMBIOS: Update BIOS Information (Type 0) to version V3.2.0
......................................................................

SMBIOS: Update BIOS Information (Type 0) to version V3.2.0

Add Extended BIOS ROM Size field.

Change-Id: Iec35c8c66210f0ddc07a2ca6f976a1f8fc53037d
Signed-off-by: Elyes HAOUAS 
Reviewed-on: https://review.coreboot.org/c/31416
Tested-by: build bot (Jenkins) 
Reviewed-by: Nico Huber 
---
M src/arch/x86/smbios.c
M src/include/smbios.h
2 files changed, 8 insertions(+), 4 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Nico Huber: Looks good to me, approved

diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c
index c0545ce..f816647 100644
--- a/src/arch/x86/smbios.c
+++ b/src/arch/x86/smbios.c
@@ -371,14 +371,17 @@
 #endif
 #endif /* CONFIG_CHROMEOS */

-	/* As a work around to prevent a compiler error, temporarily specify
-	 * 16 MiB flash sizes when ROM size >= 16 MiB.  An update is necessary
-	 * once the SMBIOS specification addresses ROM sizes > 16 MiB.
-	 */
    uint32_t rom_size = CONFIG_ROM_SIZE;
    rom_size = MIN(CONFIG_ROM_SIZE, 16 * MiB);
    t->bios_rom_size = (rom_size / 65535) - 1;

+	if (CONFIG_ROM_SIZE >= 1 * GiB) {
+		t->extended_bios_rom_size =
+			DIV_ROUND_UP(CONFIG_ROM_SIZE, GiB) | (1 << 14);
+	} else {
+		t->extended_bios_rom_size = DIV_ROUND_UP(CONFIG_ROM_SIZE, MiB);
+	}
+
    t->system_bios_major_release = 4;
    t->bios_characteristics =
    	BIOS_CHARACTERISTICS_PCI_SUPPORTED |
diff --git a/src/include/smbios.h b/src/include/smbios.h
index 34a3e5b..38ebcdc 100644
--- a/src/include/smbios.h
+++ b/src/include/smbios.h
@@ -250,6 +250,7 @@
    u8 system_bios_minor_release;
    u8 ec_major_release;
    u8 ec_minor_release;
+	u16 extended_bios_rom_size;
    u8 eos[2];
 } __packed;