Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44108 )
Change subject: soc/intel/common: Include Alderlake device IDs ......................................................................
Patch Set 1:
(5 comments)
https://review.coreboot.org/c/coreboot/+/44108/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44108/1//COMMIT_MSG@9 PS1, Line 9: Alderlake
Alder Lake
Ack
https://review.coreboot.org/c/coreboot/+/44108/1/src/include/device/pci_ids.... File src/include/device/pci_ids.h:
https://review.coreboot.org/c/coreboot/+/44108/1/src/include/device/pci_ids.... PS1, Line 3627: #define PCI_DEVICE_ID_INTEL_ADL_GT0 0x46ff : #define PCI_DEVICE_ID_INTEL_ADL_GT1 0x4600 : #define PCI_DEVICE_ID_INTEL_ADL_GT1_1 0x4601 : #define PCI_DEVICE_ID_INTEL_ADL_GT1_2 0x4602 : #define PCI_DEVICE_ID_INTEL_ADL_GT1_3 0x4603 : #define PCI_DEVICE_ID_INTEL_ADL_GT1_4 0x4610 : #define PCI_DEVICE_ID_INTEL_ADL_GT1_5 0x4611 : #define PCI_DEVICE_ID_INTEL_ADL_GT1_6 0x4612 : #define PCI_DEVICE_ID_INTEL_ADL_GT1_7 0x4613 : #define PCI_DEVICE_ID_INTEL_ADL_GT1_8 0x4618 : #define PCI_DEVICE_ID_INTEL_ADL_GT1_9 0x4619
Does the lack of _P_ or _S_ mean these could belong to either an ADL-P or an ADL-S ?
yes Tim
https://review.coreboot.org/c/coreboot/+/44108/1/src/soc/intel/common/block/... File src/soc/intel/common/block/cpu/mp_init.c:
https://review.coreboot.org/c/coreboot/+/44108/1/src/soc/intel/common/block/... PS1, Line 78: }
same here 😊
Ack
https://review.coreboot.org/c/coreboot/+/44108/1/src/soc/intel/common/block/... PS1, Line 79: }
nit: space before }. All entries except JSL seem to follow that pattern.
Ack
https://review.coreboot.org/c/coreboot/+/44108/1/src/soc/intel/common/block/... PS1, Line 80: }
Same here.
Ack
-
Subrata Banik (Code Review)