Change in coreboot[master]: nb/intel/haswell/pcie.c: Fix getting PCI function

[Angel Pons (Code Review)]

Attention is currently required from: Nico Huber, Arthur Heymans, Patrick Rudolph.
Hello Nico Huber, Arthur Heymans, Patrick Rudolph,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/55688

to review the following change.

Change subject: nb/intel/haswell/pcie.c: Fix getting PCI function
......................................................................

nb/intel/haswell/pcie.c: Fix getting PCI function

Use `PCI_DEV2DEVFN` to convert a `PCI_DEV` into a devfn.

Tested on Asrock B85M Pro4, `PCI_FUNC` now obtains the correct value.

Change-Id: Ia3bbd56ce0adba9d24f62ffc016cd825bcf3cc6a
Signed-off-by: Angel Pons 
---
M src/northbridge/intel/haswell/pcie.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/55688/1

diff --git a/src/northbridge/intel/haswell/pcie.c b/src/northbridge/intel/haswell/pcie.c
index ac6d4ca..2cd80be 100644
--- a/src/northbridge/intel/haswell/pcie.c
+++ b/src/northbridge/intel/haswell/pcie.c
@@ -50,7 +50,7 @@
 {
    const struct northbridge_intel_haswell_config *config = config_of(dev);

-	const uint8_t func = PCI_FUNC(PCI_BDF(dev));
+	const uint8_t func = PCI_FUNC(PCI_DEV2DEVFN(PCI_BDF(dev)));

assert(func < ARRAY_SIZE(config->peg_cfg));