Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34425 )
Change subject: src/amd/picasso: Update PCI bridge devices ......................................................................
Patch Set 12:
(1 comment)
https://review.coreboot.org/c/coreboot/+/34425/12/src/soc/amd/picasso/includ... File src/soc/amd/picasso/include/soc/pci_devs.h:
https://review.coreboot.org/c/coreboot/+/34425/12/src/soc/amd/picasso/includ... PS12, Line 157: 0x1
redefining device 1, already used with GPP bridges.
These are on a different bus. Hmm, _SOC_DEV assumes bus 0. We can't hardcode the bus number for them. Maybe it's a better idea to remove these altogether. I can't imagine why we would need them where we're not given a pointer to the device, and we can search if absolutely necessary.
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Marshall Dawson (Code Review)