Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58146 )
Change subject: cpu/x86: Require CPU_INFO_V2 when selecting PARALLEL_MP ......................................................................
cpu/x86: Require CPU_INFO_V2 when selecting PARALLEL_MP
This will reduce the number of AP init paths we need to support.
BUG=b:194391185, b:179699789 TEST=Boot guybrush to OS and see all CPUs initialized correctly
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I05beb591bd7b3a26b6c51c10d4ffd6f8621c12eb --- M src/cpu/x86/Kconfig M src/cpu/x86/mp_init.c M src/cpu/x86/sipi_vector.S M src/cpu/x86/smm/smm_stub.S 4 files changed, 7 insertions(+), 27 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/58146/1
diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index 99e33bb..fb5b541 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -2,6 +2,7 @@ def_bool y depends on !LEGACY_SMP_INIT depends on SMP + select CPU_INFO_V2 help This option uses common MP infrastructure for bringing up APs in parallel. It additionally provides a more flexible mechanism diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c index 123b2b5..d395377 100644 --- a/src/cpu/x86/mp_init.c +++ b/src/cpu/x86/mp_init.c @@ -183,26 +183,23 @@ * been loaded. */ static void asmlinkage ap_init(unsigned int cpu) { - struct cpu_info *info; + struct cpu_info *info = cpu_info();
/* Ensure the local APIC is enabled */ enable_lapic();
- info = cpu_info(); - info->index = cpu; - info->cpu = cpus_dev[cpu]; + info->cpu = cpus_dev[info->index];
cpu_add_map_entry(info->index); - thread_init_cpu_info_non_bsp(info);
/* Fix up APIC id with reality. */ info->cpu->path.apic.apic_id = lapicid();
if (cpu_is_intel()) - printk(BIOS_INFO, "AP: slot %d apic_id %x, MCU rev: 0x%08x\n", cpu, + printk(BIOS_INFO, "AP: slot %zu apic_id %x, MCU rev: 0x%08x\n", info->index, info->cpu->path.apic.apic_id, get_current_microcode_rev()); else - printk(BIOS_INFO, "AP: slot %d apic_id %x\n", cpu, + printk(BIOS_INFO, "AP: slot %zu apic_id %x\n", info->index, info->cpu->path.apic.apic_id);
/* Walk the flight plan */ @@ -217,20 +214,10 @@ sp->gdt = (uintptr_t)&gdt; sp->gdtlimit = (uintptr_t)&gdt_end - (uintptr_t)&gdt - 1; sp->idt_ptr = (uintptr_t)&idtarg; - if (CONFIG(CPU_INFO_V2)) { - sp->per_cpu_segment_descriptors = (uintptr_t)&per_cpu_segment_descriptors; - sp->per_cpu_segment_selector = per_cpu_segment_selector; - } + sp->per_cpu_segment_descriptors = (uintptr_t)&per_cpu_segment_descriptors; + sp->per_cpu_segment_selector = per_cpu_segment_selector; sp->stack_size = CONFIG_STACK_SIZE; sp->stack_top = ALIGN_DOWN((uintptr_t)&_estack, CONFIG_STACK_SIZE); - /* - * In the CPU_INFO_V2 case, we don't need to pre-allocate the space on the stack. - * Instead we push them onto the top of the stack in the sipi vector. - */ - if (!CONFIG(CPU_INFO_V2)) { - /* Adjust the stack top to take into account cpu_info. */ - sp->stack_top -= sizeof(struct cpu_info); - } }
#define NUM_FIXED_MTRRS 11 diff --git a/src/cpu/x86/sipi_vector.S b/src/cpu/x86/sipi_vector.S index 491f1de..55256de 100644 --- a/src/cpu/x86/sipi_vector.S +++ b/src/cpu/x86/sipi_vector.S @@ -104,7 +104,6 @@ subl %eax, %edx mov %edx, %esp
-#if CONFIG(CPU_INFO_V2) push_cpu_info index=%ecx push_per_cpu_segment_data
@@ -118,7 +117,6 @@ shl $3, %eax /* The index is << 3 in the segment selector */ add per_cpu_segment_selector, %eax mov %eax, %gs -#endif
andl $0xfffffff0, %esp /* ensure stack alignment */
diff --git a/src/cpu/x86/smm/smm_stub.S b/src/cpu/x86/smm/smm_stub.S index e409983..60bde99 100644 --- a/src/cpu/x86/smm/smm_stub.S +++ b/src/cpu/x86/smm/smm_stub.S @@ -84,19 +84,15 @@ .word 0xffff, 0x0000 .byte 0x00, 0x8b, 0x80, 0x00
-#if CONFIG(CPU_INFO_V2) per_cpu_segment_descriptors: .rept CONFIG_MAX_CPUS /* selgdt 0x28, flat data segment */ .word 0xffff, 0x0000 .byte 0x00, 0x93, 0xcf, 0x00 .endr -#endif /* CPU_INFO_V2 */ smm_relocate_gdt_end:
-#if CONFIG(CPU_INFO_V2) .set per_cpu_segment_selector, per_cpu_segment_descriptors - smm_relocate_gdt -#endif /* CPU_INFO_V2 */
.align 4 .code32 @@ -167,7 +163,6 @@ movl $0, 4(%ebx) #endif
-#if CONFIG(CPU_INFO_V2) push_cpu_info index=%ecx push_per_cpu_segment_data
@@ -181,7 +176,6 @@ shl $3, %eax /* The index is << 3 in the segment selector */ add $per_cpu_segment_selector, %eax mov %eax, %gs -#endif
/* Create stack frame by pushing a NULL stack base pointer */ pushl $0x0