Kane Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37272 )
Change subject: mb/google/hatch/variants/helios: DPTF solution update ......................................................................
mb/google/hatch/variants/helios: DPTF solution update
Modify DPTF parameters.
BUG=b:131272830 BRANCH=firmware-hatch-12672.B TEST=emerge-hatch coreboot chromeos-bootimage
Signed-off-by: Kane Chen kane_chen@pegatron.corp-partner.google.com Change-Id: I93930525edf4c5efb6b73bdfc8f16950754f7c9a --- M src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl 1 file changed, 7 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/37272/1
diff --git a/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl b/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl index 20a61d7..bcc9715 100644 --- a/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl +++ b/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl @@ -25,9 +25,9 @@ #define DPTF_TSR1_SENSOR_NAME "5V Regulator" #define DPTF_TSR1_PASSIVE 0 #define DPTF_TSR1_CRITICAL 70 -#define DPTF_TSR1_ACTIVE_AC0 43 -#define DPTF_TSR1_ACTIVE_AC1 40 -#define DPTF_TSR1_ACTIVE_AC2 38 +#define DPTF_TSR1_ACTIVE_AC0 42 +#define DPTF_TSR1_ACTIVE_AC1 41 +#define DPTF_TSR1_ACTIVE_AC2 39
#define DPTF_TSR2_SENSOR_ID 2 #define DPTF_TSR2_SENSOR_NAME "Ambient" @@ -36,14 +36,8 @@
#define DPTF_TSR3_SENSOR_ID 3 #define DPTF_TSR3_SENSOR_NAME "CPU" -#define DPTF_TSR3_PASSIVE 90 -#define DPTF_TSR3_CRITICAL 105 -#define DPTF_TSR3_ACTIVE_AC0 87 -#define DPTF_TSR3_ACTIVE_AC1 85 -#define DPTF_TSR3_ACTIVE_AC2 83 -#define DPTF_TSR3_ACTIVE_AC3 80 -#define DPTF_TSR3_ACTIVE_AC4 78 -#define DPTF_TSR3_ACTIVE_AC5 75 +#define DPTF_TSR3_PASSIVE 85 +#define DPTF_TSR3_CRITICAL 90
#define DPTF_ENABLE_CHARGER #define DPTF_ENABLE_FAN_CONTROL @@ -91,7 +85,7 @@ 0, 0, 0 }, Package () { - _SB.DPTF.TFN1, _SB.DPTF.TSR1, 100, 100, 80, 60, 0, 0, 0, 0, + _SB.DPTF.TFN1, _SB.DPTF.TSR1, 100, 90, 70, 50, 0, 0, 0, 0, 0, 0, 0 }, Package () { @@ -99,7 +93,7 @@ 0, 0, 0 }, Package () { - _SB.DPTF.TFN1, _SB.DPTF.TSR3, 100, 90, 69, 56, 46, 36, 30, 0, + _SB.DPTF.TFN1, _SB.DPTF.TSR3, 100, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } })
Kane Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37272 )
Change subject: mb/google/hatch/variants/helios: DPTF solution update ......................................................................
Patch Set 1: Code-Review+1
Hello Philip Chen, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37272
to look at the new patch set (#2).
Change subject: mb/google/hatch/variants/helios: DPTF solution update ......................................................................
mb/google/hatch/variants/helios: DPTF solution update
Modify DPTF parameters.
BUG=b:131272830 BRANCH=firmware-hatch-12672.B TEST=emerge-hatch coreboot chromeos-bootimage
Signed-off-by: Kane Chen kane_chen@pegatron.corp-partner.google.com Change-Id: I93930525edf4c5efb6b73bdfc8f16950754f7c9a --- M src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl 1 file changed, 4 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/37272/2
Kane Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37272 )
Change subject: mb/google/hatch/variants/helios: DPTF solution update ......................................................................
Patch Set 2: Code-Review+1
Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37272 )
Change subject: mb/google/hatch/variants/helios: DPTF solution update ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37272/2/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl:
https://review.coreboot.org/c/coreboot/+/37272/2/src/mainboard/google/hatch/... PS2, Line 94: 90 Does this mean we do not require to run fan at 100% even when TSR1 temperature above 42 degree C ? Previous case we were running fan at 100% when TSR1 temperature goes above 43 degree C.
Ken Lu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37272 )
Change subject: mb/google/hatch/variants/helios: DPTF solution update ......................................................................
Patch Set 2:
(1 comment)
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37272/2/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl:
https://review.coreboot.org/c/coreboot/+/37272/2/src/mainboard/google/hatch/... PS2, Line 94: 90
Does this mean we do not require to run fan at 100% even when TSR1 temperature above 42 degree C ? […]
Yes. We make EC control fan running at 100% when any one of sensors touch 80 degree C .
Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37272 )
Change subject: mb/google/hatch/variants/helios: DPTF solution update ......................................................................
Patch Set 2:
Patch Set 2:
(1 comment)
Patch Set 2:
(1 comment)
Can you please point to that EC part of the code where you are running fan at 100% for 80 degree C that will help us for better understanding of this CL. Thanks.
Ken Lu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37272 )
Change subject: mb/google/hatch/variants/helios: DPTF solution update ......................................................................
Patch Set 2:
Patch Set 2:
Patch Set 2:
(1 comment)
Patch Set 2:
(1 comment)
Can you please point to that EC part of the code where you are running fan at 100% for 80 degree C that will help us for better understanding of this CL. Thanks.
EC CL as below . The CL description has an error . Fan full run should be 80 degree C , not 85 degree C . https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1833944
Hello Sumeet R Pawnikar, Philip Chen, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37272
to look at the new patch set (#3).
Change subject: mb/google/hatch/variants/helios: DPTF solution update ......................................................................
mb/google/hatch/variants/helios: DPTF solution update
Modify DPTF parameters.
BUG=b:131272830 BRANCH=firmware-hatch-12672.B TEST=emerge-hatch coreboot chromeos-bootimage
Signed-off-by: Kane Chen kane_chen@pegatron.corp-partner.google.com Change-Id: I93930525edf4c5efb6b73bdfc8f16950754f7c9a --- M src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl 1 file changed, 8 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/37272/3
Kane Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37272 )
Change subject: mb/google/hatch/variants/helios: DPTF solution update ......................................................................
Patch Set 3: Code-Review+1
Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37272 )
Change subject: mb/google/hatch/variants/helios: DPTF solution update ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37272/3/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl:
https://review.coreboot.org/c/coreboot/+/37272/3/src/mainboard/google/hatch/... PS3, Line 39: 44 How did we arrive to this 44C value ? Did you check with higher value compared to 44C ? Thanks.
Ken Lu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37272 )
Change subject: mb/google/hatch/variants/helios: DPTF solution update ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37272/3/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl:
https://review.coreboot.org/c/coreboot/+/37272/3/src/mainboard/google/hatch/... PS3, Line 39: 44
How did we arrive to this 44C value ? Did you check with higher value compared to 44C ? Thanks.
You can refer to test report in https://partnerissuetracker.corp.google.com/issues/131272830 C#42 . We use application Octane and speed0meter to burn system . The report compare TSR3 PASSIVE set to 44C and 85C . The performance did not have huge impact .
Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37272 )
Change subject: mb/google/hatch/variants/helios: DPTF solution update ......................................................................
Patch Set 3: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/37272/3/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl:
https://review.coreboot.org/c/coreboot/+/37272/3/src/mainboard/google/hatch/... PS3, Line 39: 44
You can refer to test report in https://partnerissuetracker.corp.google.com/issues/131272830 C#42 . […]
We have reviewed the partner issue comments and as per the test results shared on it, this CL change looks fine.
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/37272 )
Change subject: mb/google/hatch/variants/helios: DPTF solution update ......................................................................
mb/google/hatch/variants/helios: DPTF solution update
Modify DPTF parameters.
BUG=b:131272830 BRANCH=firmware-hatch-12672.B TEST=emerge-hatch coreboot chromeos-bootimage
Signed-off-by: Kane Chen kane_chen@pegatron.corp-partner.google.com Change-Id: I93930525edf4c5efb6b73bdfc8f16950754f7c9a Reviewed-on: https://review.coreboot.org/c/coreboot/+/37272 Reviewed-by: Sumeet R Pawnikar sumeet.r.pawnikar@intel.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl 1 file changed, 8 insertions(+), 14 deletions(-)
Approvals: build bot (Jenkins): Verified Sumeet R Pawnikar: Looks good to me, approved Kane Chen: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl b/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl index 20a61d7..a359284 100644 --- a/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl +++ b/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl @@ -18,16 +18,16 @@
#define DPTF_TSR0_SENSOR_ID 0 #define DPTF_TSR0_SENSOR_NAME "Battery Charger" -#define DPTF_TSR0_PASSIVE 50 +#define DPTF_TSR0_PASSIVE 59 #define DPTF_TSR0_CRITICAL 80
#define DPTF_TSR1_SENSOR_ID 1 #define DPTF_TSR1_SENSOR_NAME "5V Regulator" #define DPTF_TSR1_PASSIVE 0 #define DPTF_TSR1_CRITICAL 70 -#define DPTF_TSR1_ACTIVE_AC0 43 -#define DPTF_TSR1_ACTIVE_AC1 40 -#define DPTF_TSR1_ACTIVE_AC2 38 +#define DPTF_TSR1_ACTIVE_AC0 42 +#define DPTF_TSR1_ACTIVE_AC1 41 +#define DPTF_TSR1_ACTIVE_AC2 39
#define DPTF_TSR2_SENSOR_ID 2 #define DPTF_TSR2_SENSOR_NAME "Ambient" @@ -36,14 +36,8 @@
#define DPTF_TSR3_SENSOR_ID 3 #define DPTF_TSR3_SENSOR_NAME "CPU" -#define DPTF_TSR3_PASSIVE 90 -#define DPTF_TSR3_CRITICAL 105 -#define DPTF_TSR3_ACTIVE_AC0 87 -#define DPTF_TSR3_ACTIVE_AC1 85 -#define DPTF_TSR3_ACTIVE_AC2 83 -#define DPTF_TSR3_ACTIVE_AC3 80 -#define DPTF_TSR3_ACTIVE_AC4 78 -#define DPTF_TSR3_ACTIVE_AC5 75 +#define DPTF_TSR3_PASSIVE 44 +#define DPTF_TSR3_CRITICAL 90
#define DPTF_ENABLE_CHARGER #define DPTF_ENABLE_FAN_CONTROL @@ -91,7 +85,7 @@ 0, 0, 0 }, Package () { - _SB.DPTF.TFN1, _SB.DPTF.TSR1, 100, 100, 80, 60, 0, 0, 0, 0, + _SB.DPTF.TFN1, _SB.DPTF.TSR1, 100, 90, 70, 50, 0, 0, 0, 0, 0, 0, 0 }, Package () { @@ -99,7 +93,7 @@ 0, 0, 0 }, Package () { - _SB.DPTF.TFN1, _SB.DPTF.TSR3, 100, 90, 69, 56, 46, 36, 30, 0, + _SB.DPTF.TFN1, _SB.DPTF.TSR3, 100, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } })