[M] Change in coreboot[master]: drivers/smbus: SC16IS750 I2C to UART converter chip initialization

[Ahamed Husni (Code Review)]

Ahamed Husni has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/67342 )

Change subject: drivers/smbus: SC16IS750 I2C to UART converter chip initialization
......................................................................

drivers/smbus: SC16IS750 I2C to UART converter chip initialization

This patch adds the functionality to initialize the sc16is750
i2c to uart converter chip with a 14.7MHz input clock to support
115200 baud rate.

Change-Id: Ib31188b8c0f9b0ce9454da984e630eca9101d145
Signed-off-by: Husni Faiz 
---
M src/console/Kconfig
M src/drivers/smbus/Makefile.inc
M src/drivers/smbus/i2c_smbus_console.c
A src/drivers/smbus/sc16is750_init.c
A src/drivers/smbus/sc16is750_init.h
5 files changed, 80 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/67342/1

diff --git a/src/console/Kconfig b/src/console/Kconfig
index 4f2abb3..9d62cb1 100644
--- a/src/console/Kconfig
+++ b/src/console/Kconfig
@@ -323,6 +323,14 @@
    help
      This an 8-bit data register.

+config SC16IS750_INIT
+	bool "Initialize SC16IS750 I2C to UART converter chip"
+	default n
+	depends on CONSOLE_I2C_SMBUS
+	help
+	  SC16IS750 is a slave I2C to UART converter chip. Enabling
+	  this option will initialize the chip.
+
 endif # CONSOLE_I2C_SMBUS

config CONSOLE_QEMU_DEBUGCON
diff --git a/src/drivers/smbus/Makefile.inc b/src/drivers/smbus/Makefile.inc
index 271b6b7..6bf56d9 100644
--- a/src/drivers/smbus/Makefile.inc
+++ b/src/drivers/smbus/Makefile.inc
@@ -1,3 +1,8 @@
+ifeq ($(CONFIG_SC16IS750_INIT),y)
+bootblock-y += sc16is750_init.c
+romstage-y += sc16is750_init.c
+endif
+
 ifeq ($(CONFIG_CONSOLE_I2C_SMBUS),y)
 bootblock-y += i2c_smbus_console.c
 romstage-y += i2c_smbus_console.c
diff --git a/src/drivers/smbus/i2c_smbus_console.c b/src/drivers/smbus/i2c_smbus_console.c
index 367191a..594f15b 100644
--- a/src/drivers/smbus/i2c_smbus_console.c
+++ b/src/drivers/smbus/i2c_smbus_console.c
@@ -3,12 +3,16 @@
 #include <console/i2c_smbus.h>
 #include <device/smbus_host.h>
 #include <southbridge/intel/bd82x6x/pch.h>
+#include "sc16is750_init.h"

void i2c_smbus_console_init(void)
 {
 #if (CONFIG(CONSOLE_I2C_SMBUS) && (ENV_ROMSTAGE || ENV_BOOTBLOCK))
    early_pch_init();
 #endif
+#if (CONFIG(SC16IS750_INIT) && (ENV_ROMSTAGE || ENV_BOOTBLOCK))
+	sc16is750_init();
+#endif
 }

void i2c_smbus_console_tx_byte(unsigned char c)
diff --git a/src/drivers/smbus/sc16is750_init.c b/src/drivers/smbus/sc16is750_init.c
new file mode 100644
index 0000000..444233a
--- /dev/null
+++ b/src/drivers/smbus/sc16is750_init.c
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include "sc16is750_init.h"
+
+void sc16is750_write_byte(uint8_t reg, unsigned char c)
+{
+	do_smbus_write_byte(CONFIG_FIXED_SMBUS_IO_BASE, \
+		CONFIG_CONSOLE_I2C_SMBUS_SLAVE_ADDRESS, \
+		reg, c);
+}
+
+/*
+	UART configuration: 8 bit word length, No parity, 1 stop bit (8-N-1)
+	Divisor value set here is calculated for 115200 baud rate
+	in 14.7MHz clock input to chip.
+*/
+
+void sc16is750_init(void)
+{
+	// Enable special register set
+	sc16is750_write_byte(REG_LCR << 3, 0b10000011);
+
+	sc16is750_write_byte(REG_DLL << 3, 0x08);
+	sc16is750_write_byte(REG_DLH << 3, 0x00);
+
+	// Disable special register set
+	sc16is750_write_byte(REG_LCR << 3, 0b00000011);
+}
diff --git a/src/drivers/smbus/sc16is750_init.h b/src/drivers/smbus/sc16is750_init.h
new file mode 100644
index 0000000..c8e984e
--- /dev/null
+++ b/src/drivers/smbus/sc16is750_init.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef I2C_TO_UART_H
+#define I2C_TO_UART_H
+
+#include <console/i2c_smbus.h>
+#include <device/i2c.h>
+#include <device/smbus_host.h>
+#include <southbridge/intel/bd82x6x/pch.h>
+
+#define REG_THR 0x00    // Transmit Holding Register
+#define REG_LCR 0x03    // Line Control Register
+
+// Special Register Set is accessible only when LCR[7] is logic 1
+#define REG_DLL 0x00    // divisor latch LSB
+#define REG_DLH 0x01    // divisor latch MSB
+
+void sc16is750_write_byte(uint8_t reg, unsigned char c);
+void sc16is750_init(void);
+
+#endif /* I2C_TO_UART_H */