Change in coreboot[master]: soc/intel: Allow enable/disable ME via CMOS

[Sean Rhodes (Code Review)]

Attention is currently required from: SRIDHAR SIRICILLA, Furquan Shaikh, Rizwan Qureshi, Tim Wawrzynczak, Subrata Banik, Angel Pons, Sridhar Siricilla, Patrick Rudolph.
Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52800 )

Change subject: soc/intel: Allow enable/disable ME via CMOS
......................................................................

Patch Set 55:

(3 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/52800/comment/46872c8a_e86ea598 
PS48, Line 11:
> also adding one line here about the motivation would be helpful why we need this ? […]

Ack

File src/soc/intel/common/block/cse/cse.c:

https://review.coreboot.org/c/coreboot/+/52800/comment/95a113a8_a772d57b 
PS48, Line 980: disable_me
> are you taking care of return status? what if https://review.coreboot. […]

Ack

https://review.coreboot.org/c/coreboot/+/52800/comment/b212cea4_28557e9a 
PS48, Line 1003: enable_me
> same here ?

Ack