Attention is currently required from: Felix Singer, Angel Pons, Arthur Heymans, Nicholas Chin, Fabian Groffen, Elyes Haouas.
Kevin Keijzer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73097 )
Change subject: mb/asrock/b75m-itx: Add Sandy/Ivy Bridge board B75M-ITX ......................................................................
Patch Set 6: Code-Review+1
(13 comments)
Patchset:
PS6: This should take care of all your comments. It still compiles and runs fine.
File src/mainboard/asrock/b75m-itx/Kconfig:
https://review.coreboot.org/c/coreboot/+/73097/comment/4c427579_821faf6c PS5, Line 20: select MAINBOARD_HAS_LIBGFXINIT
Please put it before NORTHBRIDGE_INTEL_SANDYBRIDGE to keep the options sorted.
Done
File src/mainboard/asrock/b75m-itx/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/73097/comment/d7627016_80144d9b PS5, Line 6: ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads : bootblock-y += early_init.c : romstage-y += early_init.c
Please order by the stages. […]
Done
File src/mainboard/asrock/b75m-itx/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/73097/comment/8cb94cdc_b7d06e20 PS5, Line 4: register "gfx.use_spread_spectrum_clock" = "0" : register "gpu_cpu_backlight" = "0x00000000" : register "gpu_dp_b_hotplug" = "4" : register "gpu_dp_c_hotplug" = "4" : register "gpu_dp_d_hotplug" = "4" : register "gpu_panel_port_select" = "PANEL_PORT_LVDS" : register "gpu_panel_power_backlight_off_delay" = "0" : register "gpu_panel_power_backlight_on_delay" = "0" : register "gpu_panel_power_cycle_delay" = "4" : register "gpu_panel_power_down_delay" = "0" : register "gpu_panel_power_up_delay" = "0" : register "gpu_pch_backlight" = "0x00000000
The zeroed options can be removed. Unset options are zero by default.
Done
https://review.coreboot.org/c/coreboot/+/73097/comment/4560ea8c_5cbd01ac PS5, Line 47: device pci 16.1 off # Management Engine Interface 2 : end
Please move the end-keyword in the lines before if the device scope doesn't contain anything.
Done
File src/mainboard/asrock/b75m-itx/dsdt.asl:
https://review.coreboot.org/c/coreboot/+/73097/comment/9f788c06_bed23f42 PS5, Line 10: // OEM revision
Remove comment
Done
https://review.coreboot.org/c/coreboot/+/73097/comment/8d0a6801_c002d204 PS5, Line 17: /* global NVS and variables. */
Remove comment
Done
https://review.coreboot.org/c/coreboot/+/73097/comment/4e106698_a7e30a37 PS5, Line 21: Scope (_SB) { : Device (PCI0)
Simplify to `Device (_SB. […]
Done
File src/mainboard/asrock/b75m-itx/early_init.c:
https://review.coreboot.org/c/coreboot/+/73097/comment/16353964_974ebcbb PS5, Line 12: void bootblock_mainboard_early_init(void) : { : /* no COM1 header installed, do not enable UART */ : }
Can be removed. There is a weak function which is called instead.
Done
File src/mainboard/asrock/b75m-itx/gpio.c:
https://review.coreboot.org/c/coreboot/+/73097/comment/b10d46a4_c1079cf4 PS5, Line 157: },
Remove one tab
Done
https://review.coreboot.org/c/coreboot/+/73097/comment/47cf16b1_b3283c5f PS5, Line 163: },
Remove one tab
Done
https://review.coreboot.org/c/coreboot/+/73097/comment/5e0b8f14_c3ef0084 PS5, Line 169: },
Remove one tab
Done
File src/mainboard/asrock/b75m-itx/hda_verb.c:
https://review.coreboot.org/c/coreboot/+/73097/comment/ca0754b3_00575551 PS5, Line 1: /* SPDX-License-Identifier: GPL-2.0-only */
Some files are already licensed under GPL-2.0-or-later. […]
Done
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Kevin Keijzer (Code Review)