Change in coreboot[master]: soc/intel: cnl,icl,elh,jsl,tgl: enable C6DRAM

[Nico Huber (Code Review)]

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45417 )

Change subject: soc/intel: cnl,icl,elh,jsl,tgl: enable C6DRAM
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Patch Set 2:
> > There are 0 mainboards that use this feature right now, and you want to enable it for all of those platforms? Have you tested it on any?
>
> Heh, I did not say this shall be merged without any testing ;) I just didn't have the time earlier to add all relevant people.

The default is to review and merge patches. If you want to
avoid confusion, you can add a tag in the commit summary,
e.g. [UNTESTED] or [WIP]. Or mark them as WIP in Gerrit
(works already when pushing, e.g. `refs/for/master%wip`).