Brandon Breitenstein has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44358 )
Change subject: mb/google/volteer: Make devicetree default as Aux Orientation retimer controlled ......................................................................
mb/google/volteer: Make devicetree default as Aux Orientation retimer controlled
With new board designs being introduced it does not make sense for the default devicetree setting to be retimer disabled on port 0 for Aux Orientation. Change the default to be Aux Orintation retimer controlled on all ports and move the SOC controlled overrides to the corresponding overridetree files.
BUG=NONE BRANCH=NONE TEST=Built image for delbin and verified that port 0 flip is working.
Change-Id: I5ff59493472db096c027d223f2fd61545dc935e2 Signed-off-by: Brandon Breitenstein brandon.breitenstein@intel.com --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb M src/mainboard/google/volteer/variants/halvor/overridetree.cb M src/mainboard/google/volteer/variants/malefor/overridetree.cb M src/mainboard/google/volteer/variants/terrador/overridetree.cb M src/mainboard/google/volteer/variants/trondo/overridetree.cb M src/mainboard/google/volteer/variants/volteer/overridetree.cb M src/mainboard/google/volteer/variants/volteer2/overridetree.cb 7 files changed, 28 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/44358/1
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index 53bbe5a..4bb3ad8 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -160,9 +160,9 @@
# TCSS USB3 register "TcssXhciEn" = "1" - register "TcssAuxOri" = "1" - register "IomTypeCPortPadCfg[0]" = "0x090E000A" - register "IomTypeCPortPadCfg[1]" = "0x090E000D" + register "TcssAuxOri" = "0" + register "IomTypeCPortPadCfg[0]" = "0x09000000" + register "IomTypeCPortPadCfg[1]" = "0x09000000" register "IomTypeCPortPadCfg[2]" = "0x09000000" register "IomTypeCPortPadCfg[3]" = "0x09000000" register "IomTypeCPortPadCfg[4]" = "0x09000000" diff --git a/src/mainboard/google/volteer/variants/halvor/overridetree.cb b/src/mainboard/google/volteer/variants/halvor/overridetree.cb index 12e059c..e34ea21 100644 --- a/src/mainboard/google/volteer/variants/halvor/overridetree.cb +++ b/src/mainboard/google/volteer/variants/halvor/overridetree.cb @@ -17,6 +17,10 @@
register "SaGv" = "SaGv_Disabled"
+ register "TcssAuxOri" = "1" + register "IomTypeCPortPadCfg[0]" = "0x090E000A" + register "IomTypeCPortPadCfg[1]" = "0x090E000D" + device domain 0 on device pci 15.0 on chip drivers/i2c/generic diff --git a/src/mainboard/google/volteer/variants/malefor/overridetree.cb b/src/mainboard/google/volteer/variants/malefor/overridetree.cb index c84ed83..3895c5c 100644 --- a/src/mainboard/google/volteer/variants/malefor/overridetree.cb +++ b/src/mainboard/google/volteer/variants/malefor/overridetree.cb @@ -19,6 +19,10 @@
register "SaGv" = "SaGv_Disabled"
+ register = "TcssAuxOri" = "1" + register = "IomTypeCPortPadCfg[0]" = "0x090E000A" + register = "IomTypeCPortPadCfg[1]" = "0x090E000D" + # I2C Port Config register "SerialIoI2cMode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci, diff --git a/src/mainboard/google/volteer/variants/terrador/overridetree.cb b/src/mainboard/google/volteer/variants/terrador/overridetree.cb index 8c0fb38..936a5d2 100644 --- a/src/mainboard/google/volteer/variants/terrador/overridetree.cb +++ b/src/mainboard/google/volteer/variants/terrador/overridetree.cb @@ -19,6 +19,10 @@
register "SaGv" = "SaGv_Disabled"
+ register "TcssAuxOri" = "1" + register "IomTypeCPortPadCfg[0]" = "0x090E000A" + register "IomTypeCPortPadCfg[1]" = "0x090E000D" + device domain 0 on device pci 15.0 on chip drivers/i2c/generic diff --git a/src/mainboard/google/volteer/variants/trondo/overridetree.cb b/src/mainboard/google/volteer/variants/trondo/overridetree.cb index 0932b64..72b1431 100644 --- a/src/mainboard/google/volteer/variants/trondo/overridetree.cb +++ b/src/mainboard/google/volteer/variants/trondo/overridetree.cb @@ -1,5 +1,10 @@ chip soc/intel/tigerlake register "SaGv" = "SaGv_Disabled" + + register "TcssAuxOri" = "1" + register "IomTypeCPortPadCfg[0]" = "0x090E000A" + register "IomTypeCPortPadCfg[1]" = "0x090E000D" + device domain 0 on device pci 15.1 on chip drivers/i2c/hid diff --git a/src/mainboard/google/volteer/variants/volteer/overridetree.cb b/src/mainboard/google/volteer/variants/volteer/overridetree.cb index d4bd7f4..2409ab5 100644 --- a/src/mainboard/google/volteer/variants/volteer/overridetree.cb +++ b/src/mainboard/google/volteer/variants/volteer/overridetree.cb @@ -43,6 +43,10 @@ }, }, }" + register "TcssAuxOri" = "1" + register "IomTypeCPortPadCfg[0]" = "0x090E000A" + register "IomTypeCPortPadCfg[1]" = "0x090E000D" + device domain 0 on device pci 15.0 on chip drivers/i2c/generic diff --git a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb index 62749fc..e32099b 100644 --- a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb +++ b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb @@ -1,4 +1,8 @@ chip soc/intel/tigerlake + register "TcssAuxOri" = "1" + register "IomTypeCPortPadCfg[0]" = "0x090E000A" + register "IomTypeCPortPadCfg[1]" = "0x090E000D" + device domain 0 on device pci 15.0 on chip drivers/i2c/generic
Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44358 )
Change subject: mb/google/volteer: Make devicetree default as Aux Orientation retimer controlled ......................................................................
Patch Set 1:
(3 comments)
please add eldrid. it has no retimer on C0.
https://review.coreboot.org/c/coreboot/+/44358/1/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/halvor/overridetree.cb:
PS1: halvor has a burnside bridge on C0.
https://review.coreboot.org/c/coreboot/+/44358/1/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/terrador/overridetree.cb:
PS1: terrador has a burnside bridge on C0.
https://review.coreboot.org/c/coreboot/+/44358/1/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/trondo/overridetree.cb:
PS1: trondo has a burnside bridge on C0.
Brandon Breitenstein has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44358 )
Change subject: mb/google/volteer: Make devicetree default as Aux Orientation retimer controlled ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44358/1/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/halvor/overridetree.cb:
PS1:
halvor has a burnside bridge on C0.
Thanks I wasn't sure and didn't see any bugs for c0 on any of these boards so I added it will remove
Hello build bot (Jenkins), Caveh Jalali, Ravishankar Sarawadi, Nick Vaccaro, Utkarsh H Patel,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44358
to look at the new patch set (#2).
Change subject: mb/google/volteer: Make devicetree default as Aux Orientation retimer controlled ......................................................................
mb/google/volteer: Make devicetree default as Aux Orientation retimer controlled
With new board designs being introduced it does not make sense for the default devicetree setting to be retimer disabled on port 0 for Aux Orientation. Change the default to be Aux Orintation retimer controlled on all ports and move the SOC controlled overrides to the corresponding overridetree files.
BUG=NONE BRANCH=NONE TEST=Built image for delbin and verified that port 0 flip is working.
Change-Id: I5ff59493472db096c027d223f2fd61545dc935e2 Signed-off-by: Brandon Breitenstein brandon.breitenstein@intel.com --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb M src/mainboard/google/volteer/variants/eldrid/overridetree.cb M src/mainboard/google/volteer/variants/malefor/overridetree.cb M src/mainboard/google/volteer/variants/trondo/overridetree.cb M src/mainboard/google/volteer/variants/volteer/overridetree.cb M src/mainboard/google/volteer/variants/volteer2/overridetree.cb 6 files changed, 20 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/44358/2
Hello build bot (Jenkins), Caveh Jalali, Ravishankar Sarawadi, Nick Vaccaro, Utkarsh H Patel,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44358
to look at the new patch set (#3).
Change subject: mb/google/volteer: Make devicetree default as Aux Orientation retimer controlled ......................................................................
mb/google/volteer: Make devicetree default as Aux Orientation retimer controlled
With new board designs being introduced it does not make sense for the default devicetree setting to be retimer disabled on port 0 for Aux Orientation. Change the default to be Aux Orintation retimer controlled on all ports and move the SOC controlled overrides to the corresponding overridetree files.
BUG=NONE BRANCH=NONE TEST=Built image for delbin and verified that port 0 flip is working.
Change-Id: I5ff59493472db096c027d223f2fd61545dc935e2 Signed-off-by: Brandon Breitenstein brandon.breitenstein@intel.com --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb M src/mainboard/google/volteer/variants/eldrid/overridetree.cb M src/mainboard/google/volteer/variants/malefor/overridetree.cb M src/mainboard/google/volteer/variants/trondo/overridetree.cb M src/mainboard/google/volteer/variants/volteer/overridetree.cb M src/mainboard/google/volteer/variants/volteer2/overridetree.cb 6 files changed, 20 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/44358/3
Brandon Breitenstein has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44358 )
Change subject: mb/google/volteer: Make devicetree default as Aux Orientation retimer controlled ......................................................................
Patch Set 3:
(3 comments)
Patch Set 1:
(3 comments)
please add eldrid. it has no retimer on C0.
Done added eldrid and removed the change from halvor, terrador, and trondo
https://review.coreboot.org/c/coreboot/+/44358/1/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/halvor/overridetree.cb:
PS1:
Thanks I wasn't sure and didn't see any bugs for c0 on any of these boards so I added it will remove
Done
https://review.coreboot.org/c/coreboot/+/44358/1/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/terrador/overridetree.cb:
PS1:
terrador has a burnside bridge on C0.
Done
https://review.coreboot.org/c/coreboot/+/44358/1/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/trondo/overridetree.cb:
PS1:
trondo has a burnside bridge on C0.
Done
Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44358 )
Change subject: mb/google/volteer: Make devicetree default as Aux Orientation retimer controlled ......................................................................
Patch Set 3: Code-Review+2
David Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44358 )
Change subject: mb/google/volteer: Make devicetree default as Aux Orientation retimer controlled ......................................................................
Patch Set 3: Code-Review+1
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44358 )
Change subject: mb/google/volteer: Make devicetree default as Aux Orientation retimer controlled ......................................................................
mb/google/volteer: Make devicetree default as Aux Orientation retimer controlled
With new board designs being introduced it does not make sense for the default devicetree setting to be retimer disabled on port 0 for Aux Orientation. Change the default to be Aux Orintation retimer controlled on all ports and move the SOC controlled overrides to the corresponding overridetree files.
BUG=NONE BRANCH=NONE TEST=Built image for delbin and verified that port 0 flip is working.
Change-Id: I5ff59493472db096c027d223f2fd61545dc935e2 Signed-off-by: Brandon Breitenstein brandon.breitenstein@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/44358 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Caveh Jalali caveh@chromium.org Reviewed-by: David Wu david_wu@quanta.corp-partner.google.com --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb M src/mainboard/google/volteer/variants/eldrid/overridetree.cb M src/mainboard/google/volteer/variants/malefor/overridetree.cb M src/mainboard/google/volteer/variants/trondo/overridetree.cb M src/mainboard/google/volteer/variants/volteer/overridetree.cb M src/mainboard/google/volteer/variants/volteer2/overridetree.cb 6 files changed, 20 insertions(+), 3 deletions(-)
Approvals: build bot (Jenkins): Verified David Wu: Looks good to me, but someone else must approve Caveh Jalali: Looks good to me, approved
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index 57ab9e4..ffae2f0 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -160,9 +160,9 @@
# TCSS USB3 register "TcssXhciEn" = "1" - register "TcssAuxOri" = "1" - register "IomTypeCPortPadCfg[0]" = "0x090E000A" - register "IomTypeCPortPadCfg[1]" = "0x090E000D" + register "TcssAuxOri" = "0" + register "IomTypeCPortPadCfg[0]" = "0x09000000" + register "IomTypeCPortPadCfg[1]" = "0x09000000" register "IomTypeCPortPadCfg[2]" = "0x09000000" register "IomTypeCPortPadCfg[3]" = "0x09000000" register "IomTypeCPortPadCfg[4]" = "0x09000000" diff --git a/src/mainboard/google/volteer/variants/eldrid/overridetree.cb b/src/mainboard/google/volteer/variants/eldrid/overridetree.cb index 32204c5..89026b8 100644 --- a/src/mainboard/google/volteer/variants/eldrid/overridetree.cb +++ b/src/mainboard/google/volteer/variants/eldrid/overridetree.cb @@ -1,5 +1,9 @@ chip soc/intel/tigerlake
+ register "TcssAuxOri" = "1" + register "IomTypeCPortPadCfg[0]" = "0x090E000A" + register "IomTypeCPortPadCfg[1]" = "0x090E000D" + device domain 0 on end
diff --git a/src/mainboard/google/volteer/variants/malefor/overridetree.cb b/src/mainboard/google/volteer/variants/malefor/overridetree.cb index c84ed83..b184924 100644 --- a/src/mainboard/google/volteer/variants/malefor/overridetree.cb +++ b/src/mainboard/google/volteer/variants/malefor/overridetree.cb @@ -19,6 +19,10 @@
register "SaGv" = "SaGv_Disabled"
+ register "TcssAuxOri" = "1" + register "IomTypeCPortPadCfg[0]" = "0x090E000A" + register "IomTypeCPortPadCfg[1]" = "0x090E000D" + # I2C Port Config register "SerialIoI2cMode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci, diff --git a/src/mainboard/google/volteer/variants/trondo/overridetree.cb b/src/mainboard/google/volteer/variants/trondo/overridetree.cb index 0932b64..d7c0b7a 100644 --- a/src/mainboard/google/volteer/variants/trondo/overridetree.cb +++ b/src/mainboard/google/volteer/variants/trondo/overridetree.cb @@ -1,5 +1,6 @@ chip soc/intel/tigerlake register "SaGv" = "SaGv_Disabled" + device domain 0 on device pci 15.1 on chip drivers/i2c/hid diff --git a/src/mainboard/google/volteer/variants/volteer/overridetree.cb b/src/mainboard/google/volteer/variants/volteer/overridetree.cb index a435c95..b4948ec 100644 --- a/src/mainboard/google/volteer/variants/volteer/overridetree.cb +++ b/src/mainboard/google/volteer/variants/volteer/overridetree.cb @@ -43,6 +43,10 @@ }, }, }" + register "TcssAuxOri" = "1" + register "IomTypeCPortPadCfg[0]" = "0x090E000A" + register "IomTypeCPortPadCfg[1]" = "0x090E000D" + device domain 0 on device pci 15.0 on chip drivers/i2c/generic diff --git a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb index fefe9ba..76a5b87 100644 --- a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb +++ b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb @@ -1,4 +1,8 @@ chip soc/intel/tigerlake + register "TcssAuxOri" = "1" + register "IomTypeCPortPadCfg[0]" = "0x090E000A" + register "IomTypeCPortPadCfg[1]" = "0x090E000D" + device domain 0 on device pci 15.0 on chip drivers/i2c/generic