Change in coreboot[master]: soc/amd/cezanne,picasso: add AOAC offset define for the eMMC controller

[Felix Held (Code Review)]

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/55530 )

Change subject: soc/amd/cezanne,picasso: add AOAC offset define for the eMMC controller
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soc/amd/cezanne,picasso: add AOAC offset define for the eMMC controller

BUG=b:184978118

Signed-off-by: Felix Held 
Change-Id: I03554a151aa6a6d9e15d74c63cd02239b788808a
---
M src/soc/amd/cezanne/include/soc/southbridge.h
M src/soc/amd/picasso/include/soc/southbridge.h
2 files changed, 2 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/55530/1

diff --git a/src/soc/amd/cezanne/include/soc/southbridge.h b/src/soc/amd/cezanne/include/soc/southbridge.h
index e82f33f..f90964b 100644
--- a/src/soc/amd/cezanne/include/soc/southbridge.h
+++ b/src/soc/amd/cezanne/include/soc/southbridge.h
@@ -117,6 +117,7 @@
 #define FCH_AOAC_DEV_UART1		12
 #define FCH_AOAC_DEV_AMBA		17
 #define FCH_AOAC_DEV_ESPI		27
+#define FCH_AOAC_DEV_EMMC		28

void fch_pre_init(void);
 void fch_early_init(void);
diff --git a/src/soc/amd/picasso/include/soc/southbridge.h b/src/soc/amd/picasso/include/soc/southbridge.h
index b623ed3..e9d891c 100644
--- a/src/soc/amd/picasso/include/soc/southbridge.h
+++ b/src/soc/amd/picasso/include/soc/southbridge.h
@@ -130,6 +130,7 @@
 #define FCH_AOAC_DEV_AMBA		17
 #define FCH_AOAC_DEV_UART3		26
 #define FCH_AOAC_DEV_ESPI		27
+#define FCH_AOAC_DEV_EMMC		28

#define FCH_LEGACY_UART_DECODE		(ALINK_AHB_ADDRESS + 0x20) /* 0xfedc0020 */