Martin Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/67920 )
Change subject: mb/google/brya/var/mithrax: adjust I2C5 times for TP ......................................................................
mb/google/brya/var/mithrax: adjust I2C5 times for TP
This change updates scl_lcnt, scl_hcnt, sda_hold value for I2C5 to follow I2C specification.
I2C_TCHPAD_SCL high period time is from 0.53 us to 0.6952 us. I2C_TCHPAD_SDA hold time is from 0.13 us to 0.4623 us.
BUG=b:249031186 BRANCH=brya TEST=EE check OK with test FW and TP function is normal.
Signed-off-by: John Su john_su@compal.corp-partner.google.com Change-Id: I5977f0dbba8924cc8a1c72c36358d6ba6f2de940 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67920 Reviewed-by: Ricky Chang rickytlchang@google.com Reviewed-by: Dtrain Hsu dtrain_hsu@compal.corp-partner.google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Frank Wu frank_wu@compal.corp-partner.google.com --- M src/mainboard/google/brya/variants/mithrax/overridetree.cb 1 file changed, 31 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Frank Wu: Looks good to me, approved Dtrain Hsu: Looks good to me, approved Ricky Chang: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/brya/variants/mithrax/overridetree.cb b/src/mainboard/google/brya/variants/mithrax/overridetree.cb index 5899535..2755c70 100644 --- a/src/mainboard/google/brya/variants/mithrax/overridetree.cb +++ b/src/mainboard/google/brya/variants/mithrax/overridetree.cb @@ -81,7 +81,12 @@ .speed = I2C_SPEED_FAST, .rise_time_ns = 550, .fall_time_ns = 400, - .data_hold_time_ns = 50, + .speed_config[0] = { + .speed = I2C_SPEED_FAST, + .scl_lcnt = 160, + .scl_hcnt = 70, + .sda_hold = 40, + } }, }"