[XS] Change in coreboot[main]: soc/intel/xeon_sp: Drop SPI_BASE_ADDRESS from _CRS

[Patrick Rudolph (Code Review)]

Attention is currently required from: Christian Walter, Johnny Lin, Lean Sheng Tan, Shuo Liu, Tim Chu.

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80795?usp=email )

Change subject: soc/intel/xeon_sp: Drop SPI_BASE_ADDRESS from _CRS
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Patch Set 2:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/80795/comment/63d0944a_2a3d2e55 :
PS1, Line 10: hidden the fast_spi driver will generate the _CRS marking the BAR
> If the device is hidden, configuration space read will return invalid values, hence we cannot get th […]

Usually only the VENDOR/DEVID changes to 0xffffffff when a device is hidden.
The code is here: src/soc/intel/common/block/fast_spi/fast_spi.c