[M] Change in coreboot[main]: tree: Remove blank lines before '}' and after '{'

[Elyes Haouas (Code Review)]

Attention is currently required from: Christian Walter, Elyes Haouas, Uwe Poeche.

Hello Christian Walter, Uwe Poeche, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/81455?usp=email

to look at the new patch set (#2).

The following approvals got outdated and were removed:
Code-Review+1 by Uwe Poeche, Verified+1 by build bot (Jenkins)

Change subject: tree: Remove blank lines before '}' and after '{'
......................................................................

tree: Remove blank lines before '}' and after '{'

Change-Id: I46a362270f69d0a4a28e5bb9c954f34d632815ff
Signed-off-by: Elyes Haouas 
---
M src/device/mmio.c
M src/device/pci_device.c
M src/device/resource_allocator_v4.c
M src/drivers/efi/efivars.c
M src/drivers/i2c/ptn3460/chip.h
M src/drivers/i2c/tpm/cr50.c
M src/drivers/i2c/tpm/tpm.c
M src/drivers/intel/fsp1_1/hob.c
M src/drivers/smmstore/store.c
M src/ec/starlabs/merlin/ite.c
M src/lib/coreboot_table.c
M src/lib/edid.c
M src/lib/hardwaremain.c
M src/lib/memrange.c
M src/lib/region_file.c
M src/lib/stack.c
M src/mainboard/intel/adlrvp/gpio.c
M src/mainboard/intel/coffeelake_rvp/variants/cfl_h/hda_verb.c
M src/mainboard/intel/coffeelake_rvp/variants/cfl_s/hda_verb.c
M src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/memory.c
M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c
M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/memory.c
M src/mainboard/intel/kblrvp/ramstage.c
M src/mainboard/intel/kblrvp/variants/rvp11/include/variant/hda_verb.h
M src/mainboard/intel/kblrvp/variants/rvp3/include/variant/hda_verb.h
M src/mainboard/intel/kblrvp/variants/rvp7/include/variant/hda_verb.h
M src/mainboard/intel/kunimitsu/spd/spd_util.c
M src/mainboard/intel/mtlrvp/fw_config.c
M src/mainboard/intel/shadowmountain/variants/baseboard/early_gpio.c
M src/mainboard/intel/strago/gpio.c
M src/mainboard/intel/tglrvp/romstage_fsp_params.c
M src/mainboard/protectli/vault_bsw/gpio.c
M src/mainboard/protectli/vault_cml/gpio.c
M src/mainboard/protectli/vault_ehl/gpio.h
M src/mainboard/siemens/fa_ehl/variants/fa_ehl/gpio.c
M src/mainboard/siemens/fa_ehl/variants/fa_ehl/memory.c
M src/mainboard/siemens/mc_apl1/variants/mc_apl1/gpio.c
M src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c
M src/mainboard/siemens/mc_apl1/variants/mc_apl3/gpio.c
M src/mainboard/siemens/mc_apl1/variants/mc_apl5/gpio.c
M src/mainboard/siemens/mc_apl1/variants/mc_apl6/gpio.c
M src/mainboard/siemens/mc_ehl/variants/mc_ehl1/memory.c
M src/mainboard/siemens/mc_ehl/variants/mc_ehl2/gpio.c
M src/mainboard/siemens/mc_ehl/variants/mc_ehl2/memory.c
M src/mainboard/siemens/mc_ehl/variants/mc_ehl3/gpio.c
M src/mainboard/siemens/mc_ehl/variants/mc_ehl3/memory.c
M src/mainboard/siemens/mc_ehl/variants/mc_ehl4/memory.c
M src/mainboard/siemens/mc_ehl/variants/mc_ehl5/gpio.c
M src/mainboard/siemens/mc_ehl/variants/mc_ehl5/memory.c
M src/northbridge/amd/pi/00730F01/northbridge.c
M src/northbridge/intel/e7505/raminit.c
M src/northbridge/intel/gm45/memmap.c
M src/northbridge/intel/haswell/acpi.c
M src/northbridge/intel/haswell/gma.c
M src/northbridge/intel/i440bx/memmap.c
M src/northbridge/intel/i440bx/raminit.c
M src/northbridge/intel/i945/early_init.c
M src/northbridge/intel/i945/gma.c
M src/northbridge/intel/i945/raminit.c
M src/northbridge/intel/i945/rcven.c
M src/northbridge/intel/ironlake/northbridge.c
M src/northbridge/intel/ironlake/raminit.c
M src/northbridge/intel/pineview/memmap.c
M src/northbridge/intel/sandybridge/raminit.c
M src/northbridge/intel/sandybridge/raminit_common.c
M src/northbridge/intel/sandybridge/raminit_mrc.c
M src/northbridge/intel/sandybridge/raminit_native.c
M src/northbridge/intel/x4x/raminit.c
M src/soc/nvidia/tegra/dc.h
M src/soc/nvidia/tegra124/dp.c
M src/soc/nvidia/tegra124/include/soc/sdram_param.h
M src/soc/nvidia/tegra124/sor.c
M src/soc/nvidia/tegra210/addressmap.c
M src/soc/nvidia/tegra210/dp.c
M src/soc/nvidia/tegra210/include/soc/funitcfg.h
M src/soc/nvidia/tegra210/include/soc/sdram_param.h
M src/soc/nvidia/tegra210/mipi-phy.c
M src/soc/nvidia/tegra210/sdram.c
M src/soc/nvidia/tegra210/sor.c
M src/soc/samsung/exynos5250/clock_init.c
M src/soc/samsung/exynos5250/dp-reg.c
M src/soc/samsung/exynos5420/dmc_init_ddr3.c
M src/soc/samsung/exynos5420/dp.c
M src/soc/sifive/fu540/ux00ddr.h
M src/southbridge/intel/common/pciehp.c
M src/southbridge/intel/common/smbus.c
M src/southbridge/intel/common/spi.c
M src/southbridge/intel/i82371eb/fadt.c
M src/southbridge/intel/i82801gx/sata.c
M src/southbridge/intel/i82801ix/pcie.c
M src/southbridge/intel/i82801jx/pcie.c
M src/southbridge/intel/i82870/pcibridge.c
M src/southbridge/intel/lynxpoint/pcie.c
M src/southbridge/ricoh/rl5c476/rl5c476.c
M src/southbridge/ti/pci1x2x/pci1x2x.c
M util/intelp2m/parser/parser.go
96 files changed, 3 insertions(+), 132 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/81455/2