New patch to review for coreboot: intel/fsp1_0: Allow the MRC cache to live in a FMAP region
Ben Gardner (gardner.ben@gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13632
-gerrit
commit abde3effe98a706d9afbf4c91b6a437304a5f4f8 Author: Ben Gardner gardner.ben@gmail.com Date: Mon Feb 8 12:18:09 2016 -0600
intel/fsp1_0: Allow the MRC cache to live in a FMAP region
The new option CONFIG_MRC_CACHE_FMAP will cause fastboot_cache.c to look in the FMAP for a region named "RW_MRC_CACHE" and prevents adding a CBFS file named "mrc.cache".
Tested on a fsp_baytail-based board.
Change-Id: I248f469c7e3447ac4ec7be32229fbb5584cfd2ed Signed-off-by: Ben Gardner gardner.ben@gmail.com --- src/drivers/intel/fsp1_0/Kconfig | 9 +++++++++ src/drivers/intel/fsp1_0/Makefile.inc | 2 ++ src/drivers/intel/fsp1_0/fastboot_cache.c | 16 ++++++++++++++-- 3 files changed, 25 insertions(+), 2 deletions(-)
diff --git a/src/drivers/intel/fsp1_0/Kconfig b/src/drivers/intel/fsp1_0/Kconfig index 28df90e..6aa8949 100644 --- a/src/drivers/intel/fsp1_0/Kconfig +++ b/src/drivers/intel/fsp1_0/Kconfig @@ -68,10 +68,19 @@ config ENABLE_MRC_CACHE This can either be used for fast boot, or just because the FSP wants it to be saved.
+config MRC_CACHE_FMAP + bool "Use MRC Cache in FMAP" + depends on ENABLE_MRC_CACHE + default n + help + Use the region "RW_MRC_CACHE" in FMAP instead of "mrc.cache" in CBFS. + You must define a region in your FMAP named "RW_MRC_CACHE". + config MRC_CACHE_SIZE hex "Fast Boot Data Cache Size" default 0x10000 depends on ENABLE_MRC_CACHE + depends on !MRC_CACHE_FMAP help This is the amount of space in NV storage that is reserved for the fast boot data cache storage. diff --git a/src/drivers/intel/fsp1_0/Makefile.inc b/src/drivers/intel/fsp1_0/Makefile.inc index 2c972b4..ea8f61e 100644 --- a/src/drivers/intel/fsp1_0/Makefile.inc +++ b/src/drivers/intel/fsp1_0/Makefile.inc @@ -31,6 +31,7 @@ fsp.bin-type := fsp endif
ifeq ($(CONFIG_ENABLE_MRC_CACHE),y) +ifneq ($(CONFIG_MRC_CACHE_FMAP),y) $(obj)/mrc.cache: dd if=/dev/zero count=1 \ bs=$(shell printf "%d" $(CONFIG_MRC_CACHE_SIZE) ) | \ @@ -41,4 +42,5 @@ mrc.cache-file := $(obj)/mrc.cache mrc.cache-align := 0x10000 mrc.cache-type := mrc_cache endif +endif
diff --git a/src/drivers/intel/fsp1_0/fastboot_cache.c b/src/drivers/intel/fsp1_0/fastboot_cache.c index 5c7179e..68150f9 100644 --- a/src/drivers/intel/fsp1_0/fastboot_cache.c +++ b/src/drivers/intel/fsp1_0/fastboot_cache.c @@ -19,6 +19,7 @@ #include <bootstate.h> #include <console/console.h> #include <cbfs.h> +#include <fmap.h> #include <ip_checksum.h> #include <device/device.h> #include <cbmem.h> @@ -55,11 +56,22 @@ static int is_mrc_cache(struct mrc_data_container *mrc_cache) static u32 get_mrc_cache_region(struct mrc_data_container **mrc_region_ptr) { size_t region_size; - *mrc_region_ptr = cbfs_boot_map_with_leak("mrc.cache", + + if (IS_ENABLED(CONFIG_MRC_CACHE_FMAP)) { + struct region_device rdev; + if (fmap_locate_area_as_rdev("RW_MRC_CACHE", &rdev) == 0) { + *mrc_region_ptr = rdev_mmap_full(&rdev); + return region_device_sz(&rdev); + } + *mrc_region_ptr = NULL; + return 0; + } else { + *mrc_region_ptr = cbfs_boot_map_with_leak("mrc.cache", CBFS_TYPE_MRC_CACHE, ®ion_size);
- return region_size; + return region_size; + } }
/*
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Ben Gardner