Change in coreboot[master]: mb/google/guybrush: First pass GPIO configuriation for Guybrush

[Angel Pons (Code Review)]

Attention is currently required from: Furquan Shaikh, Mathew King.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50091 )

Change subject: mb/google/guybrush: First pass GPIO configuriation for Guybrush
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Patch Set 5:

(2 comments)

File src/mainboard/google/guybrush/variants/baseboard/gpio.c:

https://review.coreboot.org/c/coreboot/+/50091/comment/79df96de_be69f872 
PS5, Line 10: 	/* PWR_BTN_L */
> Yes they will be updated when I do my next GPIO pass and will match the net names when enabled.

Aaah! Makes sense, then.

Would placing the (future) net names in the same line as the GPIO config be easier to read?

PAD_NF(GPIO_1, SYS_RESET_L, PULL_NONE),	/* SYS_RESET_L */
    PAD_NF(GPIO_2, WAKE_L, PULL_NONE),	/* WAKE_L */
    PAD_NC(GPIO_3),				/* AGPIO3 */
    PAD_NC(GPIO_4),				/* AGPIO4 */

https://review.coreboot.org/c/coreboot/+/50091/comment/574331ed_65d0da42 
PS5, Line 80: /* AGPIO69 */
            : 	PAD_NC(GPIO_69),
            : 	/* EGPIO70 */
            : 	PAD_NC(GPIO_70),
> This is how AMD refers to these gpios. […]

Understood, thanks!