Martin Roth has uploaded this change for review. ( https://review.coreboot.org/21700
Change subject: src/vendorcode/amd: Use AR variable in Makefiles ......................................................................
src/vendorcode/amd: Use AR variable in Makefiles
Change-Id: I5158f1bcc18eb5b15f310d0cf50fb787c12317c8 Signed-off-by: Martin Roth martinroth@google.com --- M src/vendorcode/amd/agesa/f12/Makefile.inc M src/vendorcode/amd/agesa/f15/Makefile.inc M src/vendorcode/amd/agesa/f15tn/Makefile.inc M src/vendorcode/amd/agesa/f16kb/Makefile.inc M src/vendorcode/amd/pi/Makefile.inc 5 files changed, 6 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/21700/1
diff --git a/src/vendorcode/amd/agesa/f12/Makefile.inc b/src/vendorcode/amd/agesa/f12/Makefile.inc index 3445b29..a5817a1 100644 --- a/src/vendorcode/amd/agesa/f12/Makefile.inc +++ b/src/vendorcode/amd/agesa/f12/Makefile.inc @@ -58,7 +58,8 @@
$(obj)/libagesa.fam12.a: $$(libagesa-objs) @printf " AGESA $(subst $(obj)/,,$(@))\n" - ar rcs $@ $+ + $(AR_libagesa) rcs $@ $+ +
romstage-libs += $(obj)/libagesa.fam12.a ramstage-libs += $(obj)/libagesa.fam12.a diff --git a/src/vendorcode/amd/agesa/f15/Makefile.inc b/src/vendorcode/amd/agesa/f15/Makefile.inc index 0172621..7a29a81 100644 --- a/src/vendorcode/amd/agesa/f15/Makefile.inc +++ b/src/vendorcode/amd/agesa/f15/Makefile.inc @@ -49,7 +49,7 @@
$(obj)/libagesa.fam15.a: $$(libagesa-objs) @printf " AGESA $(subst $(obj)/,,$(@))\n" - ar rcs $@ $+ + $(AR_libagesa) rcs $@ $+
romstage-libs += $(obj)/libagesa.fam15.a ramstage-libs += $(obj)/libagesa.fam15.a diff --git a/src/vendorcode/amd/agesa/f15tn/Makefile.inc b/src/vendorcode/amd/agesa/f15tn/Makefile.inc index c5d1eee..114be73 100644 --- a/src/vendorcode/amd/agesa/f15tn/Makefile.inc +++ b/src/vendorcode/amd/agesa/f15tn/Makefile.inc @@ -63,7 +63,7 @@
$(obj)/libagesa.fam15tn.a: $$(libagesa-objs) @printf " AGESA $(subst $(obj)/,,$(@))\n" - ar rcs $@ $+ + $(AR_libagesa) rcs $@ $+
romstage-libs += $(obj)/libagesa.fam15tn.a ramstage-libs += $(obj)/libagesa.fam15tn.a diff --git a/src/vendorcode/amd/agesa/f16kb/Makefile.inc b/src/vendorcode/amd/agesa/f16kb/Makefile.inc index 3837d8e..a08b5d7 100644 --- a/src/vendorcode/amd/agesa/f16kb/Makefile.inc +++ b/src/vendorcode/amd/agesa/f16kb/Makefile.inc @@ -63,7 +63,7 @@
$(obj)/libagesa.fam16kb.a: $$(libagesa-objs) @printf " AGESA $(subst $(obj)/,,$(@))\n" - ar rcs $@ $+ + $(AR_libagesa) rcs $@ $+
romstage-libs += $(obj)/libagesa.fam16kb.a ramstage-libs += $(obj)/libagesa.fam16kb.a diff --git a/src/vendorcode/amd/pi/Makefile.inc b/src/vendorcode/amd/pi/Makefile.inc index c4ab131..25b4a9f 100644 --- a/src/vendorcode/amd/pi/Makefile.inc +++ b/src/vendorcode/amd/pi/Makefile.inc @@ -151,7 +151,7 @@
$(agesa_output_path)/libagesa.a: $(call src-to-obj,libagesa,$(agesa_src_files)) @printf " AGESA $(subst $(obj)/,,$(@))\n" - ar rcs $@ $+ + $(AR_libagesa) rcs $@ $+
bootblock-libs += $(agesa_output_path)/libagesa.a romstage-libs += $(agesa_output_path)/libagesa.a